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motorola master selection guide logic: standard, special and programmable 3.01 logic: standard, special and programmable in brief . . . page motorola programmable arrays (mpa) 3.11 . . . . . . . . . . . . selection by function logic functions 3.18 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . device index 3.136 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ordering information 3.146 . . . . . . . . . . . . . . . . . . . . . . . . . . . case outlines 3.150 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . packaging information 3.183 . . . . . . . . . . . . . . . . . . . . . . . . . surface mount 3.183 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . pin conversion tables 3.183 . . . . . . . . . . . . . . . . . . . . . . . tape and reel 3.184 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . this selector guide is a quick reference to motorola's vast offering of standard logic integrated circuits. in ttl, popular due to its ease of use, low cost, mediumtohigh speed operation and good output drive capability, motorola offers both ls and fast. motorola's cmos portfolio includes mc14000b standard cmos series devices, highspeed cmos consisting of a full line of products that are pinout compatible with many lsttl and mc14000b standard cmos logic devices which offers designers a solution to the longstanding combined barrier e high speed and low power. motorola's emitter coupled logic (mecl) is a nonsaturated form of digital logic which eliminates transistor storage time permitting very high speed operation. motorola offers five versions of mecl: mecl 10k, mecl 10h, mecl iii, and the recently introduced families eclinps (ecl in picoseconds) and eclinps lite. also included are timing solution products such as clock drivers, clock generators and programmable delay chips, high performance and communications products such as vco's, prescalers, and synthesizers, and a wide variety of translators, lowvoltage bus interface and serial data transmission devices. field programmable logic and in particular, field programmable arrays, have become the solution of choice for logic design implementation in applications where time to market is a critical product development factor. in addition, reconfigurable arrays have been used to enhance customer product flexibility in ways that no other technology can match.
motorola master selection guide logic: standard, special and programmable 3.11 introduction to motorola programmable arrays and the mpa design system field programmable logic and in particular, field programmable arrays, have become the solution of choice for logic design implementation in applications where time to market is a critical product development factor. in addition, reconfigurable arrays have been used to enhance customer product flexibility in ways that no other technology can match. programmable logic not only vastly reduces the time necessary to implement a static design, but significant product feature benefits can be realized when hardware can be dynamically altered as easily as software. the reconfigurable motorola programmable array (mpa) and mpa design system maximize application flexibility and minimize time to market by delivering a gate level, push button, programmable logic solution. design capture logic system designers have two basic options when selecting a method for capturing their designs. for smaller or very regular designs, schematic capture continues to be a popular design entry vehicle. with the increasing size and complexity of today's designs coupled with decreasing design cycle time requirements, many designers are turning to hardware description languages (hdls). the mpa family was designed from the outset to be well suited to both methodologies. the output of logic synthesis compilers maps effortlessly and efficiently onto the mpa architecture. unlike other fpga offerings, the mpa poses no significant architectural limitations for which the designer might otherwise have to adjust his schematic design techniques for. push button design implementation the mpa design system minimizes training investment and automatically generates design implementations which meet timing constraints. the gate level logic and abundant hierarchical routing resources of the mpa device present a rich implementation media for design implementation. mpa design tools understand and optimally utilize the mpa device resources so there are no elaborate rules to learn or design modifications required to begin design capture. staying focused on end product design rather than implementation tools or device architecture gets the design done faster and, unlike other programmable solutions, without programmable logic device specificity to impede future design migration efforts. the combination of automatic tools and gate level architecture is ideal for traditional schematic driven or high level language based design capture methods. in fact, logic synthesis tools were originally designed for and produce the most efficient results for targeting gate level devices. a design is analyzed, optimized, transformed into mpa cells, partitioned, placed and routed based on timing constraints for all paths in the design automatically. a netlist from one of the popular design capture systems or an existing xnf or lpm netlist is imported into the mpa design system. the logic is mapped to a series of mpa cells and the entire resulting netlist is optimized and checked. based on a simple clock specification, the mpa design system generates timing constraints for all paths in the design. during automatic partitioning, placement and routing path slack time is constantly redistributed insuring only the resources required to meet timing requirements are consumed. because mpa tools implement the design according to constraints, tool induced design iterations are virtually eliminated. completed layouts can be transformed into device configurations, as well as annotated simulation netlists. a layout browser is also available. the mpa design system also includes complete online, hypermedia, help covers the device, the design system and the integration kits. integration kits for viewlogic, exemplar, vhdl (1076 and sdf), verilog (ovi and sdf) and orcad are included (contact your vendor for additional kits).all these features add up to a powerful yet extremely easy to use design implementation engine for the mpa product family. design importation designs can be captured using schematics, a high level language, or a combination of these entry methods using commercially available design capture and logic synthesis software and the appropriate interface kit. alternatively, existing designs can be retargeted from other programmable logic devices to the mpa device using commercial logic synthesis tools or the powerful retargetting capabilities provided with mpa design system. design importation begins with a netlist and an optional clock specification file. the clock specification file provides a mechanism for the user or design capture tools to document system level timing requirements. in addition, a rich set of attributes can be attached to specific components or nets within the design to specify timing and design pinout constraints.
motorola master selection guide logic: standard, special and programmable 3.12 a retargetting rules file is read and the input netlist is transformed into a series of mpa cells and associated interconnections. rules files provide a mechanism to perform attribute mapping, cell mapping and macro expansion. by creating custom rule files, the user can extend the importation process from arbitrary sources. the mpa design system comes with rules for it's native library/edif. the resulting netlist is optimized to clip unused logic and remove redundant logic. for example: each mpa cell has programmable input inversion capability. all inverters or noninverting buffers can be removed from the netlist and replaced with signal sense information attached to each input. a series of design rule checks are performed to insure design integrity before the layout process begins. constraint generation timing constraints, the optimized mpa netlist and static timing analysis is used to generate path slack constraints for all paths in the design. each unique signal pathway between a register output and a register input throughout the design are enumerated. the total logic and estimated or real wire delays along the path are summed. the time between the active upstream register clock edge and the next active downstream clock edge minus the downstream register setup time is subtracted from the total path delay. this difference is called path slack. if any path in the design has a negative slack value, the implementation will not function at the required clock rate(s). path constraints are utilized throughout the layout process to insure that a design implementation which meets timing constraints is automatically generated. if no clock or timing specifications are provided, the mpa design system uses the fastest possible clock based on very small net delay estimates to generate the path constraints. this usually results in the best possible implementation, but may take longer than the time required to generate a satisfactory rather than best possible result. contrast this to other programmable logic design tools which only provide manual net constraint annotation or net criticality assignment. in these cases significant effort is necessary to generate constraints and many costly iterations are required to tune these constraints for a given design. if any changes are made to the design, another costly round of iterations is required. autolayout the autolayout process makes use of the hierarchical organization of the mpa device to minimize run time and deliver implementations that meet timing requirements. designs which have diverse timing requirements are ideally implemented because path slack estimates are refined throughout the autolayout process insuring only the resources required to meet timing requirements are consumed. the process begins by flattening the design and partitioning it into small component groups of approximately the same size called clusters. a cluster boundary delay estimation is applied to pull the most tightly constrained paths into a minimum number of clusters. the clusters are then assigned to zones talking into account zonal boundary delay cost and relative zone placement delay costs. other costs like total number of port connections per zone and are also considered. as assignment proceeds, cluster and zone boundary delay costs are added to each path and slack is recomputed. next global placement and routing is done. global routes begin and end on either i/o cells or port cells. intrazone placement and routing is deferred to a later phase. during global routing all the port cell and i/o cell locations are fixed and the connections between them established. high fanout nets are constructed in a highly regular manner to insure efficient resource utilization. as in partitioning, slack estimates are refined throughout global routing. finally the intrazonal placement and routing is done. cells assigned to a particular zone are placed and routed to other zone cells or zone port cells. port cells and core cells are constructed to allow port swapping. core cells can be routed through if necessary. allowing core cells to act as routing cells allows dynamic adjustment of routing resources within the zone. dynamic resource adjustment is a powerful design specific adaptation mechanism. this process produces a layout from which device configurations, delay back annotations, and chipviews can be generated. incremental design support when specification changes necessitate design iterations, simply push the button again. constraints are automatically recalculated and autolayout only reworks those portions of the design which have changed. full incremental design support means simple design changes to facilitate design verification can be made quickly and easily. delay back annotation designs can be verified through numerous methods. one particularly useful method is the annotation of device and implementation specific delays back into the original simulation environment to improve system or device level simulation accuracy. a mpa device layout can be transformed into an appropriately formatted delay annotation file or annotated netlist quickly and easily. the annotated delay information represents the worst case delays for a given device speed grade. chipview while the mpa design system provides a rich set of reports describing the implementation of a design, a graphical view of the implementation can be indispensable for reviewing overall layout quality. chipview provides a graphical view of a completed layout. chipview can be useful during initial design iterations to visually verify i/o pin placements before commencing pcb layout, for example.
motorola master selection guide logic: standard, special and programmable 3.13 configuration a layout can be transformed into a device configuration which, when loaded into the appropriate mpa device, produces a physical design realization. many formatting options are available. the mpa download pod can be used to emulate a serial prom. using the pod, device configuration files can be downloaded to a device directly from the pc or workstation development environment. integration kits the mpa design system can be used with a large number of commercial electronic design automation software. for each supported vendor, an integration kit is provided which facilitates mpa design within that vendors' environment. many of these kits are available from motorola and included at no charge on the mpa design system cdrom. other kits can be acquired directly from the vendor. refer to the mpa design system product list for more information. low cost, easy access mpa design systems are easy to use, competitively priced and widely available. copies of mpa design system software supporting up to 8000 gates can be downloaded from the world wide web (www) at url: http://sps.motorola.com/fpga complete kits including download pod, evaluation board, mpa device, cdrom and documentation can be ordered from your local authorized motorola distributor or motorola sales representative.
motorola master selection guide logic: standard, special and programmable 3.14 the motorola programmable array (mpa) design system is a bridge between a design capture environment and motorola field programmable arrays. the mpa design system automatically transforms designs into device configurations to realize a design, when loaded into an mpa device. a design is automatically analyzed, optimized, transformed into mpa cells, partitioned, placed and routed based on timing constraints for every path in the design. mpa design tools understand and optimally utilize the mpa device architecture; this eliminates the need to learn a new set of rules and makes these tools ideally suited for use with logic synthesis. full incremental design support reduces design implementation time and powerful library retargeting capabilities allow you to reuse designs which may have been implemented on less capable devices. the mpa design system operates on existing hardware platforms and supports design capture and simulation tools from more than 10 vendors. all these features plus online, hypermedia, help make the mpa design system a powerful, yet extremely easy to use, design implementation engine. features ? push button implementation ? optimal use of mpa device resources ? optimal results with gate level design input ? library of common msi functions ? design flow manager ? design retargeter ? timing driven with integrated static timing analysis ? layout delay extraction for post layout simulation ? layout viewer ? incremental design support ? online, hypermedia, documentation ? supports all popular design capture and simulation tools ? lowest cost fpga development systems. ? instant access; downloading via the internet (www, ftp). ? supports multiple speed grades timing driven autolayout ? partition design into clusters ? assign clusters to zones ? global place & route ? zonal place & route ? continuous slack redistribution design importation ? read appropriate rules file ? retarget to mpa primitives ? macro expansion ? design optimization ? design rule checks constraint generation ? read user constraints ? path enumeration ? path constraint generation mpa device chipview ? read stored layout ? construct graphical representation delay annotation ? read stored layout ? construct annotated netlist configuration ? read stored layout ? construct bitstream mpa family overview

semiconductor technical data
motorola master selection guide logic: standard, special and programmable 3.15 motorola programmable array (mpa) products are a high density, high performance, low cost, solution for your reconfigurable logic needs. when used with our automatic high performance design tools, mpa delivers custom logic solutions in minutes rather than weeks. and the low cost keeps those solutions competitive throughout the product lifecycle. the mpa architecture has solved the historical problems associated with fine grain devices without sacrificing reprogrammability, reliability, or cost. mpa1000 devices are reprogrammable sram based products manufactured on a standard 0.43 m leff cmos process with logic capacities from 3,500 to more than 22,000 equivalent fpga gates. mpa logic resources hold a single gate or storage element providing a highly efficient, adaptable, design implementation medium. gate level logic resources, abundant hierarchical interconnection resources and automatic, timing driven, tools work together to quickly provide design implementations that meet timing constraints without sacrificing device utilization. staying focused on end product design rather than implementation tools or device architecture gets the design done faster and, unlike other programmable solutions, without programmable logic device specificity to impede future design migration efforts. the combination of automatic tools and gate level architecture is ideal for traditional schematic driven or high level language based design methodologies. in fact, logic synthesis tools were originally designed for and produce the most efficient results when targeting gate level devices. high mpa1000 register count and controlled clock skew is ideal for designs employing pipelining techniques such as communications. the unique set of mpa1000 i/o programming options make these devices suitable for industrial and computer interfacing circuits. mpa1000 family members fpga gates* part no. logic cells internal flipflops i/o cell flipflops avail i/o pins packages availability 3500 MPA1016FN mpa1016dd 1600 400 122 160 61 80 84 plcc 128 pqfp now now 8000 mpa1036fn mpa1036dd mpa1036dh mpa1036hi 3600 900 122 160 240 240 61 80 120 120 84 plcc 128 pqfp 160 pqfp 181 pga now now now now 14200 mpa1064dh mpa1064dk mpa1064ke mpa1064bg 6400 1600 240 320 320 320 120 160 160 160 160 pqfp 208 pqfp 224 pga 256 pbga now now now 3q97 22000 mpa1100dk mpa1100hv mpa1100bg 10000 2500 320 400 400 160 200 200 208 pqfp 299 pga 256 pbga now now 3q97 * equivalent to industry standards, as supplied by most manufacturers. programmable array 3,500 to 22,000 gates ? multiple i/o from 80200 i/o pins ? programmable 3v/5v i/o at any site ? multiple packaging options ? fine grain structure is optimized for logic synthesis ? programmable output drive, 4/6ma @ 5.0v and 3.3v ? high register count, with 5602,900 flipflops ? ieee 1149.1 jtag boundary scan ? eight lowskew (<1ns) clocks mpa family overview

semiconductor technical data
motorola master selection guide logic: standard, special and programmable 3.16
the mpa17128, mpa1765 serial otp eproms provide a compact, low pin count, nonvolatile configuration store for mpa1000 devices. mpa17000 devices can be cascaded for increased memory capacity when needed. they are available in the standard 8pin plastic dip (n suffix), 8pin soic (d suffix) and 20pin plcc (fn suffix) packages. ? configuration eprom for mpa1000 devices ? voltage range e 4.5 to 6.0v ? maximum read current of 10ma ? standby current of 10 m a, typical ? industry standard synchronous serial interface ? full static operation ? 10mhz maximum clock rate at 5.0v ? programmable polarity on hardware reset ? programs with industry standard programmers ? electrostatic discharge protection > 2000 volts ? 8pin pdip and soic; 20pin plcc packages ? commercial (0 to +70 c) and industrial (40 to +85 c) 8 1 7 2 6 3 5 4 v cc v pp ceo v ss data clk reset/oe ce v cc data v pp ceo v ss clk reset/ oe ce 19 18 13 17 16 15 14 12 11 10 9 45678 20 1 2 3 8lead pinouts (top view) 20lead pinout (top view) nc nc nc nc nc nc nc nc nc nc nc nc 128k, 64k serial eprom fn suffix plcc package case 77502 d suffix plastic soic package case 75105 p suffix plastic package case 62605 1 8 1 8 3 4 8 19 pin names function data i/o clock reset input and output enable chip enable input ground chip enable output programming voltage supply +4.5 to 6.0v power supply not connected pins data clk reset/oe ce v ss ceo v pp v cc nc mpa family overview semiconductor technical data
motorola master selection guide logic: standard, special and programmable 3.17

the mpa17c256 is an easy to use and cost effective serial configuration memory ideally suited for use with today's popular sram based fpgas. the mpa17c256 is available in 8pin pdip and 20pin soic and plcc packages, adhering to industry standard pinouts. the device interfaces downstream fpga(s) with a very simple enable, clock and data interface. the mpa17c256 is reprogrammable with no need for a higher programming asuper voltageo; it may even be reprogrammed on board. the mpa17c256 also has user programmable reset/oe polarity. ? ee programmable 262,144 x 1 bit serial memories designed to store configuration programs for fpgas ? simple interface to sram fpgas ? cascadable to support additional configurations or future higher density fpgas ? low power cmos eeprom process ? programmable reset polarity ? available in space efficient 8pin pdip, 20pin soic and 20pin plcc packages ? insystem programmable via 2wire bus controlling the mpa17c256 serial eeprom most connections between the fpga device and the serial eeprom are simple and selfexplanatory: ? the data output of the mpa17c256 drives din of the fpga devices ? the master fpga dclk output drives the clk input of the mpa17c256 ? the ceo output of the first mpa17c256 drives the ce input of the next mpa17c256 in a cascade chain of eeproms. ? ser_en must be connected to v cc ? ce enables the chip and is required to enable the data output pin ? reset/oe is chip reset and is part of the data output enable structure this document contains information on a new product. specifications and information herein are subject to change without notice. pin names function data i/o clock reset input and output enable chip enable input ground chip enable output programming enable +4.5 to 6.0v power supply not connected pins data clk reset/oe ce v ss ceo ser_en v cc nc mpa17c256 fn suffix 20lead plcc package case 77502 dw suffix 20lead plastic soic wide package case 751d04 p suffix 8lead plastic package case 62605 mpa family overview semiconductor technical data
motorola master selection guide logic: standard, special and programmable 3.18 selection by function in order to better serve our customers, we have made some modifications to the selection by function portion of the logic selector guide. for easy selection of logic's newer, more complex functions, as well as standard family functions, refer to the subject index below. within the selection by function tables on the next 27 pages, you will find functions sorted by these broad subjects, and then broken down alphabetically into more precise functions. logic functions amplifier 3.19 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . arithmetic operators 3.19 . . . . . . . . . . . . . . . . . . bounce eliminator 3.19 . . . . . . . . . . . . . . . . . . . . . . buffers 3.19 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . buffers, 3state 3.19 . . . . . . . . . . . . . . . . . . . . . . . . . bus interface 3.110 . . . . . . . . . . . . . . . . . . . . . . . . . . . cbm 3.112 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . clock distribution chips 3.112 . . . . . . . . . . . . . . clock drivers 3.112 . . . . . . . . . . . . . . . . . . . . . . . . . . coax cable drivers 3.113 . . . . . . . . . . . . . . . . . . . . comparators 3.114 . . . . . . . . . . . . . . . . . . . . . . . . . . . converters 3.114 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . counters 3.114 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . decoder/demultiplexers 3.116 . . . . . . . . . . . . . . detectors 3.117 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . display decode drivers 3.117 . . . . . . . . . . . . . . . . dividers 3.117 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . driver 3.117 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . edacs 3.117 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . encoders 3.117 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . encoder/decoders 3.118 . . . . . . . . . . . . . . . . . . . . . expanders 3.118 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . field programmable gate arrays 3.118 . . . . . flipflops 3.118 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . gates, and/nand 3.121 . . . . . . . . . . . . . . . . . . . . . . . . gates, complex 3.122 . . . . . . . . . . . . . . . . . . . . . . . . . gates, exclusive or/exclusive nor 3.123 . . . gates, nor 3.124 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . gates, or 3.124 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . industrial control unit 3.125 . . . . . . . . . . . . . . . inverters 3.125 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . inverter/buffers, 2state 3.125 . . . . . . . . . . . . . latches 3.126 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . memory support 3.127 . . . . . . . . . . . . . . . . . . . . . . . miscellaneous 3.127 . . . . . . . . . . . . . . . . . . . . . . . . . multiplexer/data selectors 3.127 . . . . . . . . . . . multivibrators 3.129 . . . . . . . . . . . . . . . . . . . . . . . . . oscillators 3.129 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . oscillator/timers 3.130 . . . . . . . . . . . . . . . . . . . . . . parity checkers 3.130 . . . . . . . . . . . . . . . . . . . . . . . . phaselocked loop 3.130 . . . . . . . . . . . . . . . . . . . . prescalers 3.130 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . programmable delay chips 3.131 . . . . . . . . . . . . rams 3.131 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . receivers 3.131 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . registers 3.132 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . register files 3.132 . . . . . . . . . . . . . . . . . . . . . . . . . . schmitt triggers 3.132 . . . . . . . . . . . . . . . . . . . . . . . scsi bus terminators 3.132 . . . . . . . . . . . . . . . . . . serial eproms 3.132 . . . . . . . . . . . . . . . . . . . . . . . . . . shift registers 3.132 . . . . . . . . . . . . . . . . . . . . . . . . . synthesizers 3.134 . . . . . . . . . . . . . . . . . . . . . . . . . . . transceivers 3.134 . . . . . . . . . . . . . . . . . . . . . . . . . . . translators 3.134 . . . . . . . . . . . . . . . . . . . . . . . . . . . . vco 3.135 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
motorola master selection guide logic: standard, special and programmable 3.19 selection by function description tech. device(s) pins dip sm amplifier fiber optic post amplifier ecl mc10sx1125 16 d arithmetic operators 4bit arithmetic logic unit ttl mc74f181 24 n dw ttl mc74f381 20 n dw ttl mc74f382 20 n dw 4bit arithmetic logic unit/function generator ecl mc10h181 24 p,l, pw, lw fn ecl mc10181 24 p, l 4bit binary full adder with fast carry ttl mc74f283 16 n d ttl sn54ls83a sn74ls83a 14 n,j d ttl sn54ls283 sn74ls283 16 n,j d 4bit full adder cmos mc14008b 16 p, l d 9's complementer cmos mc14561b 14 p d bcd rate multiplier cmos mc14527b 16 p dw carry lookahead generator ttl mc74f182 16 n d dual 2bit adder/subtractor ecl mc10h180 16 p, l fn ecl mc10180 16 p, l look ahead carry block ecl mc10h179 16 p, l fn nbcd adder cmos mc14560b 16 p, l d triple serial adder (negative logic) cmos mc14038b 16 l bounce eliminator hex contact bounce eliminator cmos mc14490 16 p, l dw buffers 1:2 differential fanout buffer ecl mc100lvel11 8 d 2:8 differential fanout buffer ecl mc100lve310 mc100e310 28 fn dual 1:3 fanout buffer ecl mc100lvel13 mc100el13 20 dw expandable buffer dtl mc832 14 p, l low voltage dual 1:4, 1:5 differential fanout buffer, ecl/pecl compatible ecl mc100lve210 mc100e210 28 fn buffers, 3state lowvoltage cmos 16bit buffer, 3state, inverting with 5v tolerant inputs and outputs cmos mc74lcx16240a 20 dw,m, dt lowvoltage cmos 16bit buffer, 3state, noninverting with 5v tolerant inputs and outputs cmos mc74lcx16244 20 dw,m, dt lowvoltage cmos octal buffer, 3state, noninverting with 5v tolerant inputs and outputs cmos mc74lcx244 20 dw,m, dt lowvoltage cmos octal buffer, 3state, inverting with 5v tolerant inputs and outputs cmos mc74lcx240 20 dw,m, dt lowvoltage cmos octal buffer flow through pinout, 3state, noninverting with 5v tolerant inputs and outputs cmos mc74lcx541 20 dw,m, dt lowvoltage cmos octal buffer flow through pinout, 3state, inverting with 5v tolerant inputs and outputs cmos mc74lcx540 20 dw,m, dt lowvoltage cmos quad buffer, 3state, inverting with 5v tolerant inputs and outputs cmos mc74lcx125 20 dw,m, dt lowvoltage quiet cmos octal buffer cmos mc74lvq541 20 d,m, sd,dt lowvoltage quiet cmos octal buffer, 3state, noninverting cmos mc74lvq244 20 dw,m, sd,dt
motorola master selection guide logic: standard, special and programmable 3.110 selection by function description sm dip pins device(s) tech. buffers, 3state lowvoltage quiet cmos octal buffer, 3state, inverting cmos mc74lvq240 20 dw,m, sd,dt lowvoltage quiet cmos quad buffer, 3state, noninverting cmos mc74lvq125 14 d,m, sd,dt bus interface 10bit buffer/line driver (inverting), with 3state outputs ttl mc74f828 24 n dw 10bit buffer/line driver (noninverting), with 3state outputs ttl mc74f827 24 n dw 3bit registered bus transceiver, 25 w cutoff outputs ecl mc10e336 mc100e336 28 fn 3bit scannable registered bus transceiver ecl mc10e337 mc100e337 28 fn 32bit to 32/16/8bit dynamic read/write bus sizer cmos mc68150*33 68 fn cmos mc68150*40 68 fn 9bit bus interface, ninv, 3 state outputs ttl mc74f823 24 n dw dual bus driver/receiver with 4to1 output multiplexer (25 w ) ecl mc10h332 20 p, l fn hex 3state inverting buffer with common enables cmos mc54hc366 mc74hc366 16 n,j hex 3state inverting buffer with separate 2bit and 4bit sections cmos mc74hc368 16 n hex 3state noninverting buffer with common enables cmos mc54hc365 mc74hc365 16 n,j dt hex 3state noninverting buffer with separate 2bit and 4bit sections cmos mc54hc367 mc74hc367 16 n,j hex buffer 4/2bit/inverting with 3state outputs ttl sn54ls368a sn74ls368a 16 n,j d hex buffer 4/2bit/noninverting with 3state outputs ttl sn54ls367a sn74ls367a 16 n,j d hex buffer driver, 4+2bit, inverting, with 3state outputs ttl mc74f368 16 n d hex buffer gated enable inverting with 3state outputs ttl sn54ls366a sn74ls366a 16 n,j d hex buffer gated enable noninverting with 3state outputs ttl sn54ls365a sn74ls365a 16 n,j d hex buffer/driver gated enable inverting, with 3state outputs ttl mc74f366 16 n d hex buffer/driver gated enable noninverting, with 3state outputs ttl mc74f365 16 n d hex buffer/driver, 4+2bit, noninverting, with 3state outputs ttl mc74f367 16 n d hex with 3state outputs buffer (noninverting) cmos mc14503b 16 p, l d octal 3state noninverting bus transceiver with lsttl compatible inputs cmos mc54hct245a mc74hct245a 20 n,j dw, sd,dt octal bidirectional transceiver with 3state inputs/outputs cmos mc74ac245 20 n dw cmos mc74act245 20 n dw octal bidirectional transceiver with 3state outputs cmos mc74ac620 20 n dw cmos mc74act620 20 n dw cmos mc74ac623 20 n dw cmos mc74act623 20 n dw cmos mc74ac640 20 n dw cmos mc74act640 20 n dw cmos mc74ac643 20 n dw cmos mc74act643 20 n dw ttl mc74f245 20 n dw octal bidirectional transceiver with 8bit parity generator checker with 3 state o tp ts ttl mc74f657a 24 n dw y checker, with 3state outputs ttl mc74f657b 24 n dw octal bidirectional transceiver, with 3state inputs/outputs ttl mc74f1245 20 n dw octal buffer with 3state outputs (81ls95) ttl sn54ls795 sn74ls795 20 n,j dw (81ls96) ttl sn54ls796 sn74ls796 20 n,j dw (81ls97) ttl sn54ls797 sn74ls797 20 n,j dw (81ls98) ttl sn54ls798 sn74ls798 20 n,j dw
motorola master selection guide logic: standard, special and programmable 3.111 selection by function description sm dip pins device(s) tech. bus interface octal buffer/line driver with 3state outputs ttl sn54ls244 sn74ls244 20 n,j dw ttl mc74f240 20 n dw ttl mc74f241 20 n dw ttl mc74f244 20 n dw ttl sn54ls240 sn74ls240 20 n,j dw ttl sn54ls241 sn74ls241 20 n,j dw ttl sn54ls540 sn74ls540 20 n,j dw ttl sn54ls541 sn74ls541 20 n,j dw cmos mc74ac241 20 n dw cmos mc74ac244 20 n dw cmos mc74act244 20 n dw cmos mc74ac540 20 n dw cmos mc74act540 20 n dw cmos mc74ac541 20 n dw cmos mc74act541 20 n dw cmos mc74ac240 20 n dw cmos mc74act240 20 n dw cmos mc74act241 20 n dw octal bus transceiver ttl sn54ls245 sn74ls245 20 n,j dw ttl sn54ls623 sn74ls623 20 n,j dw octal bus transceiver, with 3state outputs ttl mc74f623 20 n dw octal bus transceiver/inverting with 3state outputs ttl sn54ls640 sn74ls640 20 n,j dw ttl mc74f620 20 n dw ttl mc74f640 20 n dw octal bus transceiver/noninverting with 3state outputs ttl sn54ls645 sn74ls645 20 n,j dw octal bus transceiver/register with 3state outputs noninverting cmos mc74ac652 24 n dw cmos mc74act652 24 n dw octal registered transceiver inverting, with 3state outputs ttl mc74f544 24 n dw octal transceiver/register with 3state outputs noninverting cmos mc74ac646 24 n dw cmos mc74act646 24 n dw octal transceiver/register with 3state outputs inverting cmos mc74ac648 24 n dw cmos mc74act648 24 n dw octal transceiver/register, with 3state outputs ttl mc74f646 24 n dw octal with 3state noninverting buffer/line driver/line receiver cmos mc54hc241a mc74hc241a 20 n,j dw octal with 3state noninverting buffer/line driver/line receiver with lsttl compatible inputs cmos mc54hct241a mc74hct241a 20 n,j dw g with lsttl compatible inputs cmos mc54hct244a mc74hct244a 20 n,j dw, sd,dt octal with 3state outputs inverting buffer/line driver/line receiver cmos mc54hc240a mc74hc240a 20 n,j dw, dt cmos mc54hc540a mc74hc540a 20 n,j dw octal with 3state outputs inverting buffer/line driver/line receiver with lsttl compatible inputs cmos mc74hct240a 20 n dw, sd,dt octal with 3state outputs inverting bus transceiver cmos mc54hc640a mc74hc640a 20 n,j dw octal with 3state outputs noninverting buffer/line driver/line receiver cmos mc54hc541a mc74hc541a 20 n,j dw cmos mc74vhc541 20 dw, dt,m octal with 3state outputs noninverting buffer/line driver/line receiver with lsttl compatible inputs cmos mc74hct541a 20 n dw
motorola master selection guide logic: standard, special and programmable 3.112 selection by function description sm dip pins device(s) tech. bus interface octal with 3state outputs noninverting buffer/line driver/line receiver cmos mc54hc244a mc74hc244a 20 n,j dw, sd,dt cmos mc74vhc244 20 dw, dt,m octal with 3state outputs noninverting bus transceiver cmos mc54hc245a mc74hc245a 20 n,j dw cmos mc74vhc245 20 dw dt,m octal with 3state outputs noninverting bus transceiver & d flipflop cmos mc54hc646 mc74hc646 24 n,j dw quad buffers with 3state outputs ttl sn54ls125a sn74ls125a 14 n,j d quad 3state noninverting buffers cmos mc74hc125a 14 n d,dt cmos mc74vhc125 14 d, dt,m cmos mc74hc126a 14 n d,dt quad buffer with 3state outputs cmos mc74ac125 14 n d cmos mc74act125 14 n d cmos mc74ac126 14 n d cmos mc74act126 14 n d ttl mc74f125 14 n d ttl mc74f126 14 n d ttl sn54ls126a sn74ls126a 14 n,j d quad bus driver ecl mc10192 16 p, l fn quad bus driver/receiver with 2to1 output multiplexer (25 w ) ecl mc10h330 24 p, l fn quad bus driver/receiver with transmit & receiver latches (25 w ) ecl mc10h334 20 p, l fn quad bus transceiver/inverting with 3state outputs ttl sn54ls242 sn74ls242 14 n,j d quad bus transceiver/noninverting with 3state outputs ttl sn54ls243 sn74ls243 14 n,j d quad bus transceivers with 3state outputs ttl mc74f242 14 n d ttl mc74f243 14 n d quad with 3state outputs inverting bus transceiver cmos mc74hc242 14 n triple 3input bus driver with enable (25 w ) ecl mc10h423 16 p, l fn triple 433 input bus driver (25 w ) ecl mc10h123 16 p, l fn ecl mc10123 16 p, l fn cbm cbm carrier band modem sxlg mc68194 52 *fj clock distribution chips 1:4 clock distribution chip ecl mc10el15 mc100el15 16 d 1:5 clock distribution chip ecl mc100lvel14 mc100el14 20 dw 1:6 differential clock distribution chip ecl mc10e211 mc100e211 28 fn low voltage 1:12 clock distribution chip sxlg mpc948 32 fa sxlg mpc948l 32 fa low voltage 1:9 clock distribution chip sxlg mpc947 32 fa low voltage 1:9 ecl/pecl clock distribution chip ecl mc100lve111 28 fn clock drivers 1:2 differential clock driver ecl mc10el11 mc100el11 8 d 1:6 pci clock generator/fanout buffer cmos mpc903 16 d cmos mpc904 16 d cmos mpc905 16 d 1:9 differential clock driver with low skew, enable, vbb ecl mc10e111 mc100e111 28 fn
motorola master selection guide logic: standard, special and programmable 3.113 selection by function description sm dip pins device(s) tech. clock drivers 1:9 differential ecl/pecl rambus clock buffer ecl mc10e411 28 fn 1:9 ttl/ttl clock distribution chip ecl mc10h645 28 fn 3.3/5.0v fully integrated pll clock driver cmos mpc974 52 fa 50 mhz low skew cmos pll clock driver with m p power down cmos mc88920 20 dw 66 mhz low skew cmos pll clock driver with m p powerdown/powerup feature cmos mc88921 20 dw 68030/040 pecl/ttl clock driver ecl mc10h640 mc100h640 28 fn ecl mc10h642 mc100h642 28 fn ecl mc10h644 mc100h644 20 fn clock driver quad dtype flipflop w/ matched propagation delays ttl mc74f1803 14 n d ttl mc74f803 14 n d cmos pll clock driver programmable frequency, low skew, high fanout cmos mc88pl117 52 fn dual 3.3v pll clock generator cmos mpc980 52 fa dual supply ecl/ttl 1:8 clock driver ecl mc10h643 mc100h643 28 fn high frequency pll clock generator ecl mc12429 28 fn ecl mc12430 28 fn ecl mc12439 28 fn low skew cmos clock driver cmos mc88913 14 n d low skew cmos clock driver with reset cmos mc88914 14 n d low skew cmos pll 68060 clock driver cmos mc88lv926 20 dw low skew cmos pll clock driver cmos mc88915*55 28 fn cmos mc88915*70 28 fn low skew cmos pll clock driver with processor reset cmos mc88916*70 20 dw cmos mc88916*80 20 dw low skew cmos pll clock driver 160 mhz version cmos mc88915t*160 28 fn 133 mhz version cmos mc88915t*133 28 fn 100 mhz version cmos mc88915t*100 28 fn 70 mhz version cmos mc88915t*70 28 fn 55 mhz version cmos mc88915t*55 28 fn low voltage 1:10 cmos clock driver cmos mpc946 32 fa low voltage 1:15 differential 1/2 ecl/pecl clock driver ecl mc100lve222 52 fa low voltage 1:15 pecl to cmos clock driver cmos mpc949 52 fa low voltage 1:9 differential ecl/hstl to hstl clock driver cmos mpc911 28 fn low voltage pecl pll clock driver cmos mpc992 32 fa low voltage pll clock driver cmos mpc930 mpc931 32 fa cmos mpc950 mpc951 32 fa cmos mpc956 32 fa cmos mpc970 52 fa cmos mpc972 mpc973 52 fa cmos mpc990 mpc991 52 fa low voltage wide fanout pll clock driver cmos mpc952 32 fa pecl/ttl to ttl 1: 8 clock distribution chip ecl mc10h646 mc100h646 28 fn single supply pecl/ttl 1:9 clock distribution chip ecl mc10h641 mc100h641 28 fn 2, 4/6 clock generation chip (3.3v) ecl mc100lvel38 mc100el38 20 dw 2/4, 4/6 clock generation chip ecl mc100lvel39 mc100el39 20 dw 2,4,8 differential clock driver ecl mc10el34 mc100el34 16 d coax cable drivers fibre channel coaxial cable driver and loop resiliency circuit sdx mc10sx1189 16 d 300 mbit/s led driver for fddi and fibre channel sdx mc10sx1130 16 d
motorola master selection guide logic: standard, special and programmable 3.114 selection by function description sm dip pins device(s) tech. comparators 4bit magnitude comparator ttl mc74f85 16 n d cmos mc74hc85 16 n dt ttl sn54ls85 sn74ls85 16 n,j d cmos mc14585b 16 p, l d 5bit magnitude comparator ecl mc10h166 16 p, l fn ecl mc10166 16 p, l fn 8bit equality comparator cmos mc54hc688 mc74hc688 20 n,j dw 8bit identity comparator cmos mc74act521 20 n ttl mc74f521 20 n dw 8bit magnitude comparator ttl sn54ls682 sn74ls682 20 n,j dw ttl sn54ls684 sn74ls684 20 n,j dw ttl sn54ls688 sn74ls688 20 n,j dw 9bit magnitude comparator ecl mc10e166 mc100e166 28 fn dual analog comparator with latch ecl mc10e1651 16,20 l fn dual analog comparator with latch (hiperf mc1651) ecl mc10e1652 16,20 l fn converters 4bit parallel to serial converter ecl mc10e446 mc100e446 28 fn 4bit serial to parallel converter ecl mc10e445 mc100e445 28 fn dual a/d converter ecl mc1650 16 l ecl mc1651 16 l counters 12bit binary counter cmos mc14040b 16 p, l d 12stage binary ripple counter cmos mc54hc4040a mc74hc4040a 16 n,j d,dt cmos mc74ac4040 16 n d 14bit binary counter cmos mc14020b 16 p, l d 14bit binary counter and oscillator cmos mc14060b 16 p, l d 14stage binary ripple counter cmos mc74hc4020a 16 n d,dt cmos mc74ac4020 16 n d 14stage binary ripple counter with oscillator cmos mc54hc4060 mc74hc4060 16 n,j dt cmos mc54hc4060a mc74hc4060a 16 n,j d,dt 3digit bcd counter cmos mc14553b 16 p dw 4bit bcd decade counter, asynchronous reset ttl sn54ls160a sn74ls160a 16 n,j d ttl sn54ls162a sn74ls162a 16 n,j d 4bit bidirectional binary counter, with 3state outputs ttl mc74f569 20 n dw 4bit bidirectional decade counter, with 3state outputs ttl mc74f568 20 n dw 4bit binary counter ttl sn54ls93 sn74ls93 14 n,j d ttl sn54ls293 sn74ls293 14 n,j d ecl mc10h16 16 p, l fn 4bit binary counter, synchronous presettable cmos mc14161b 16 p d cmos mc14163b 16 p d 4bit binary counter, synchronous reset ttl sn54ls161a sn74ls161a 16 n,j d ttl sn54ls163a sn74ls163a 16 n,j d 4bit up/down counter with 3state outputs ttl sn54ls569a sn74ls569a 20 n,j dw 4stage presettable ripple counters ttl sn54ls196 sn74ls196 14 n,j d ttl sn54ls197 sn74ls197 14 n,j d 4stage synchronous bidirectional counter ttl mc74f168 16 n d ttl mc74f169 16 n d 5 cascaded bcd counters cmos mc14534b 24 p, l dw 6bit universal counter, (lookahead carry) ecl mc10e136 mc100e136 28 fn 7stage ripple counter cmos mc14024b 14 p, l d
motorola master selection guide logic: standard, special and programmable 3.115 selection by function description sm dip pins device(s) tech. counters 8bit bidirectional binary counter ttl mc74f269 24 n dw 8bit bidirectional binary counter, with 3state outputs ttl mc74f579 20 n dw ttl mc74f779 16 n d 8bit ripple counter ecl mc10e137 mc100e137 28 fn 8bit synchronous binary up counter ecl mc10e016 mc100e016 28 fn bcd decade counter, synchronous presettable ttl mc74f160a 16 n d ttl mc74f162a 16 n d bcd decade synchronous bidirectional counter ttl sn54ls168 sn74ls168 16 n,j d biquinary counter ecl mc10138 16 p, l fn binary counter ecl mc10154 16 p, l ecl mc10178 16 p, l fn binary counter, synchronous presettable, 4bit ttl mc74f161a 16 n d ttl mc74f163a 16 n d counter control logic ecl mc12014 16 p, l decade counter ttl sn54ls90 sn74ls90 14 n,j d ttl sn54ls290 sn74ls290 14 n,j d cmos mc14017b 16 p, l d cmos mc74hc4017 16 n d divide by 12 counter ttl sn54ls92 sn74ls92 14 n,j d dual 4stage binary counter ttl sn54ls393 sn74ls393 16 n,j d dual 4stage binary ripple counter cmos mc54hc393 mc74hc393 14 n,j d dual 4stage binary ripple counter w 2, 5 sections cmos mc54hc390 mc74hc390 16 n,j d dual bcd up counter cmos mc14518b 16 p, l dw dual binary up counter cmos mc14520b 16 p, l dw dual decade counter ttl sn54ls390 sn74ls390 16 n,j d ttl sn54ls490 sn74ls490 16 n,j d industrial time base generator cmos mc14566b 16 p d modulo 16 binary synchronous bidirectional counter ttl sn54ls169 sn74ls169 16 n,j d octal counter cmos mc14022b 16 p, l d phase comparator and programmable counter cmos mc14568b 16 p, l d presettable 4bit bcd down counter cmos mc14522b 16 p dw presettable 4bit binary down counter cmos mc14526b 16 p, l dw presettable 4bit binary up/down counter ttl sn54ls191 sn74ls191 16 n,j d ttl sn54ls193 sn74ls193 16 n,j d presettable bcd up/down counter cmos mc14510b 16 p d presettable bcd/decade up/down counter ttl sn54ls190 sn74ls190 16 n,j d ttl sn54ls192 sn74ls192 16 n,j d presettable binary up/down counter cmos mc14516b 16 p, l d presettable binary/bcd up/down counter cmos mc14029b 16 p, l d presettable counter cmos mc54hc160 mc74hc160 16 n,j d cmos mc54hc161a mc74hc161a 16 n,j d cmos mc54hct161a mc74hct161a 16 n,j d cmos mc54hc162 mc74hc162 16 n,j d cmos mc54hc163a mc74hc163 16 n,j d cmos mc54hct163a mc74hct163a 16 n,j d presettable dividebyn counter cmos mc14018b 16 p d programmable dual binary/bcd counter cmos mc14569b 16 p, l dw
motorola master selection guide logic: standard, special and programmable 3.116 selection by function description sm dip pins device(s) tech. counters programmable modulon counters (n=09) ecl mc4016 16 p, l ecl mc4018 16 p, l ecl mc4316 16 p, l synchronous 4bit up/down counter ttl sn54ls669 sn74ls669 16 n,j d synchronous presettable binary counter cmos mc74ac161 16 n d cmos mc74act161 16 n d synchronous presettable binary counter cmos mc74ac163 16 n d cmos mc74act163 16 n d synchronous presettable binarycodeddecimal decade counter cmos mc74ac160 16 n d cmos mc74act160 16 n d cmos mc74ac162 16 n d cmos mc74act162 16 n d universal decade counter ecl mc10137 16 p, l universal hexadecimal counter ecl mc10h136 16 p, l fn ecl mc10136 16 p, l fn up/down counter with preset and ripple clock cmos mc74ac190 16 n d decoder/demultiplexers 1of10 decoder cmos mc74hc42 16 n d ttl sn54ls42 sn74ls42 16 n,j d 1of10 decoder/driver opencollector ttl sn54ls145 sn74ls145 16 n,j d 1of10 decoder, with 3state outputs ttl mc74f537 20 n dw 1of16 decoder/demultiplexer cmos mc54hc154 mc74hc154 24 n,j dw 1of16 decoder/demultiplexer with address latch cmos mc74hc4514 24 n dw 1of4 decoder, with 3state outputs ttl mc74f539 20 n dw 1of8 decoder, with 3state outputs ttl mc74f538 20 n dw 1of8 decoder/demultiplexer cmos mc74ac138 16 n d cmos mc74act138 16 n d ttl mc74f138 16 n d cmos mc54hc138a mc74hc138a 16 n,j d cmos mc74vhc138 16 d,dt, m cmos mc74hct138a 16 n d,dt ttl sn54ls138 sn74ls138 16 n,j d 1of8 decoder/demultiplexer with address latch cmos mc74hc137 16 n d cmos mc74hc237 16 n d 3line to 8line decoders/demultiplexers with address latches ttl sn54ls137 sn74ls137 16 n,j d 4bit transparent latch/4to16 line decoder (high) cmos mc14514b 24 p, l dw 4bit transparent latch/4to16 line decoder (low) cmos mc14515b 24 p, l dw 8bit addressable latch/1of8 decoder cmos mc54hc259 mc74hc259 16 n,j d bcdtodecimal decoder/binarytooctal decoder cmos mc14028b 16 p, l d binary to 14 decoder (low) ecl mc10171 16 p, l fn binary to 18 decoder, (high) ecl mc10h162 16 p, l fn ecl mc10162 16 p, l fn binary to 18 decoder, (low) ecl mc10h161 16 p, l fn ecl mc10161 16 p, l fn dual 1of4 decoder ttl sn54ls155 sn74ls155 16 n,j d dual 1of4 decoder opencollector ttl sn54ls156 sn74ls156 16 n,j d
motorola master selection guide logic: standard, special and programmable 3.117 selection by function description sm dip pins device(s) tech. decoder/demultiplexers dual 1of4 decoder/demultiplexer cmos mc74ac139 16 n d cmos mc74act139 16 n d ttl mc74f139 16 n d dual 1of4 decoder/demultiplexer cmos mc54hc139a mc74hc139a 16 n,j d ttl sn54ls139 sn74ls139 16 n,j d dual binary to 14 decoder (high) ecl mc10h172 16 p, l fn ecl mc10172 16 p, l fn dual binary to 14 decoder (low) ecl mc10h171 16 p, l fn dual binary to 1of4 decoder (active high outputs) cmos mc14555b 16 p d dual binary to 1of4 decoder (active low outputs) cmos mc14556b 16 p d lowvoltage cmos 1of8 decoder/demultiplexer with 5v tolerant inputs and outputs cmos mc74lcx138 16 d,dt lowvoltage quiet cmos 1of8 decoder/demultiplexer cmos mc74lvq138 16 d,m, sd,dt detectors analog mixer ecl mc12002 14 p, l phasefrequency detector ecl mc4044 14 p, l d ecl mc4344 14 p, l ecl mc12040 14 p, l fn ecl mch12140 mck12140 8 d display decode drivers bcdtoseven segment decoder ttl sn54ls48 sn74ls48 16 n,j d cmos mc14558b 16 p, l d bcdtoseven segment decoder/driver ttl sn54ls47 sn74ls47 16 n,j d ttl sn54ls247 sn74ls247 16 n,j d ttl sn54ls248 sn74ls248 16 n,j d ttl sn54ls249 sn74ls249 16 n,j d bcdtoseven segment latch/decoder/display driver cmos mc74hc4511 16 n d bcdtoseven segment latch/decoder/driver cmos mc14511b 16 p, l d,dw bcdtoseven segment latch/decoder/driver for liquid crystals cmos mc14543b 16 p, l d bcdtoseven segment latch/decoder/driver with ripple blanking cmos mc14544b 18 p, l gpp blanking cmos mc14513b 18 p high current bcdtoseven segment decoder/driver cmos mc14547b 16 p, l dw dividers 2 divider ecl mc10el32 mc100el32 8 d ecl mc100lvel32 8 d 4 divider ecl mc10el33 mc100el33 8 d ecl mc100lvel33 8 d driver coaxial cable driver ecl mc10el89 8 d 300mbit/s led driver for fddi and fibre channel ecl mc10sx1130 16 d edacs error detectioncorrection circuit (ibm code) ecl mc10163 16 p, l error detectioncorrection circuit (motorola code) ecl mc10193 16 p, l encoders 10line to 4line priority encoder ttl sn54ls147 sn74ls147 16 n,j d 8bit priority encoder cmos mc14532b 16 p, l d
motorola master selection guide logic: standard, special and programmable 3.118 selection by function description sm dip pins device(s) tech. encoders 8input priority encoder ttl sn54ls348 sn74ls348 16 n,j d ecl mc10h165 16 p, l fn ecl mc10165 16 p, l fn 8input priority encoder (glitchless) ttl sn54ls848 sn74ls848 16 n,j d 8line to 3line priority encoder ttl mc74f148 16 n d ttl sn54ls148 sn74ls148 16 n,j d ttl sn54ls748 sn74ls748 16 n,j d decimaltobcd encoder cmos mc74hc147 16 n d encoder/decoders cmi encoder/decoder ecl mc100sx1230 28 fn expanders dual 4iput expander htl mc669 14 p, l expandable dual 4input gate (active pullup) htl mc660 14 p, l expandable dual 4input gate (passive pullup) htl mc661 14 p, l expandable dual 4input line driver htl mc662 14 p, l expandable dual power gate dtl mc844 14 p, l dtl mc944 14 p, l field programmable gate array 14,200gate programmable array with up to 160 user i/os cmos mpa1064 160, 224 dh, ke 22,000gate programmable array with up to 200 user i/os cmos mpa1100 229 hv 3,500gate programmable array with up to 80 user i/os cmos mpa1016 84, 128 fn, dd 8,000gate programmable array with up to 120 user i/os cmos mpa1036 84, 128, 160, 181 fn, dd, dh, hi flipflops 3bit differential flipflop ecl mc10e431 mc100e431 28 fn 4bit d flipflop individual clock, reset differential output ecl mc10e131 mc100e131 28 fn 4bit d flipflop with enable ttl sn54ls379 sn74ls379 16 n,j d 4bit dtype register with with 3state outputs ttl sn54ls173a sn74ls173a 16 n,j d 5bit differential register ecl mc10e452 mc100e452 28 fn 6bit 2:1 muxregister with common clock, asynchronous master reset single ended ecl mc10e167 mc100e167 28 fn 6bit d register with common clock, asynchronous master reset, differential outputs ecl mc10e151 mc100e151 28 fn 6bit d register, with differential inputs, (data & clock) , vbb, common reset ecl mc10e451 mc100e451 28 fn 6bit parallel d register with enable cmos mc74ac378 16 n d cmos mc74act378 16 n d 9bit hold register, 700mhz, with asynchronous master reset ecl mc10e143 mc100e143 28 fn clocked flipflop dtl mc845 14 p, l clocked flipflop dtl mc945 14 p, l d flipflop with set & reset ecl mc10el31 mc100el31 8 d differential clock d flipflop ecl mc10el51 mc100el51 8 d ecl mc100lvel51 8 d differential data & clock d flipflop ecl mc10el52 mc100el52 8 d dual d flipflop cmos mc74ac74 14 n d cmos mc74act74 14 n d cmos mc14013b 14 p, l d
motorola master selection guide logic: standard, special and programmable 3.119 selection by function description sm dip pins device(s) tech. flipflops dual d flipflop with set and reset cmos mc54hc74a mc74hc74a 14 n,j d,dt cmos mc74vhc74 14 d, dt,m dual d flipflop with set and reset with lsttl compatible inputs cmos mc74hct74a 14 n d dual dtype positive edgetriggered flipflop ttl mc74f74 14 n d ttl sn54ls74a sn74ls74a 16 n,j d dual differential data and clock d flipflop with set and reset ecl mc100lvel29 mc100el29 20 dw dual jk negative edgetriggered flipflop ttl sn54ls112a sn74ls112a 16 n,j d ttl sn54ls113a sn74ls113a 14 n,j d ttl sn54ls114a sn74ls114a 14 n,j d dual jk positive edgetriggered flipflop ttl sn54ls109a sn74ls109a 16 n,j d dual jk flipflop htl mc663 14 p, l ttl sn54ls107a sn74ls107a 14 n,j d dual jk flipflop (common clock and cd separate sd) dtl mc952 14 p, l dual jk flipflop (separate clock and sd, no cd) dtl mc953 14 p, l dual jk flipflop negative edge trigger cmos mc74ac112 16 n d cmos mc74act112 16 n d dual jk flipflop negative edge trigger cmos mc74ac113 14 n d cmos mc74act113 14 n d dual jk flipflop with set and clear ttl sn54ls76a sn74ls76a 16 n,j d dual jk flipflop with set and reset cmos mc74hc112 16 n d,dt dual jk flipflop cmos mc14027b 16 p, l d dual jk flipflop with reset cmos mc74hc73 14 n d cmos mc74hc107 14 n d dual jk flipflop with set and reset cmos mc74hc76 16 n d dual jk masterslave flipflop ecl mc10135 16 p, l fn ecl mc10h135 16 p, l fn dual jk negative edgetriggered flipflop ttl mc74f112 16 n d ttl sn54ls73a sn74ls73a 14 n,j d dual jk positive edgetriggered flipflop with set & clear cmos mc74ac109 16 n d cmos mc74act109 16 n d dual jk flipflop with set and reset cmos mc74hc109 16 n d dual jk positive edgetriggered flipflop ttl mc74f109 16 n d dual typed masterslave flipflop ecl mc10131 16 p, l fn ecl mc10h131 16 p, l fn hex d flipflop ttl sn54ls174 sn74ls174 16 n,j d cmos mc14174b 16 p, l d hex d flipflop with enable ttl sn54ls378 sn74ls378 16 n,j d hex d flipflop with master reset cmos mc74ac174 16 n d ttl mc74f174 16 n d cmos mc74act174 16 n d hex d flipflop with common clock & reset cmos mc54hc174a mc74hc174a 16 n,j d cmos mc74hct174a 16 n d hex d masterslave flipflop ecl mc10h176 16 p, l fn ecl mc10176 16 p, l fn hex d masterslave flipflop with reset ecl mc10h186 16 p, l fn ecl mc10186 16 p, l fn high speed dual d masterslave flipflop ecl mc10231 16 p, l fn jk flipflop ecl mc10el35 mc100el35 8 d
motorola master selection guide logic: standard, special and programmable 3.120 selection by function description sm dip pins device(s) tech. flipflops lowvoltage cmos octal dtype flipflop with set and reset, 3state, noninverting with 5v tolerant inputs cmos mc74lcx74 14 d,dt lowvoltage cmos 16bit dtype flipflop, 3state, noninverting with 5v tolerant inputs and outputs cmos mc74lcx16374 20 dw,m, dt lowvoltage cmos octal dtype flipflop, 3state, noninverting with 5v tolerant inputs and outputs cmos mc74lcx374 20 dw,m, dt lowvoltage cmos octal dtype flipflop flow through pinout, 3state, noninverting with 5v tolerant inputs and outputs cmos mc74lcx574 20 dw,m, dt low voltage d flipflop with set & reset ecl mc100lvel31 8 d lowvoltage quiet cmos octal dtype flipflop cmos mc74lvq374 20 dw,m, sd,dt lowvoltage quiet cmos octal dtype flipflop flow through pinout cmos mc74lvq574 20 dw,m, sd,dt masterslave flipflop ecl mc1670 16 l masterslave rs flipflop htl mc664 14 p, l octal 3state inverting d flipflop cmos mc54hc534a mc74hc534a 20 n,j dw octal 3state noninverting d flipflop with lsttl compatible inputs cmos mc54hct374a mc74hct374a 20 n,j dw, sd,dt octal d flip flop, with 3state outputs ttl mc74f374 20 n dw octal d flipflop cmos mc74ac273 20 n dw cmos mc74act273 20 n dw octal d flipflop with 3state outputs/broadside pinout, f374 ttl mc74f574 20 n dw octal d flipflop with clear ttl sn54ls273 sn74ls273 20 n,j dw octal d flipflop with clock enable cmos mc74ac377 20 n dw cmos mc74act377 20 n dw octal d flipflop with common clock & reset cmos mc54hc273a mc74hc273a 20 n,j dw, dt octal d flipflop with common clock and reset with lsttl compatible inputs cmos mc74hct273a 20 n dw octal d flipflop with enable ttl mc74f377 20 n dw octal d flipflop with enable/ noninverting ttl sn54ls377 sn74ls377 20 n,j dw octal d type flipflop with 3state outputs cmos mc74ac374 20 n dw cmos mc74act374 20 n dw ttl mc74f534 20 n dw ttl sn54ls374 sn74ls374 20 n,j dw cmos mc74ac534 20 n dw cmos mc74act534 20 n dw octal dtype latch with 3state outputs cmos mc74ac564 20 n dw cmos mc74act564 20 n dw cmos mc74ac574 20 n dw cmos mc74act574 20 n dw octal with 3state outputs inverting d flipflop cmos mc74hc564a 20 n dw octal with 3state outputs noninverting d flipflop cmos mc54hc374a mc74hc374a 20 n,j dw, sd,dt cmos mc74vhc374 20 dw, dt,m cmos mc54hc574a mc74hc574a 20 n,j dw cmos mc74vhc574 20 dw, dt,m octal with 3state outputs noninverting d flipflop with lsttl compatible inputs cmos mc54hct574a mc74hct574a 20 n,j dw quad d flipflop cmos mc74ac175 16 n d cmos mc74act175 16 n d ttl mc74f175 16 n d
motorola master selection guide logic: standard, special and programmable 3.121 selection by function description sm dip pins device(s) tech. flipflops quad d flipflop ttl sn54ls175 sn74ls175 16 n,j d cmos mc14175b 16 p, l d quad d flipflop with common clock & reset cmos mc54hc175 mc74hc175 16 n,j d cmos mc54hc175a mc74hc175a 16 n,j d,sd quad dtype register with 3state outputs cmos mc14076b 16 p, l d quad parallel register with enable ttl mc74f379 16 n d quad with 3state outputs d flipflop with common clock & reset cmos mc74hc173 16 n d triple d flipflop with set and reset ecl mc100lvel30 mc100el30 20 dw gates, and/nand 13input nand gate cmos mc74hc133 16 n d ttl sn54ls133 sn74ls133 16 n,j d 8input nand gate cmos mc74hc30 14 n d ttl sn54ls30 sn74ls30 14 n,j d cmos mc14068b 14 p d dual 4input and gate ttl mc74f21 14 n d ttl sn54ls21 sn74ls21 14 n,j d cmos mc14082b 14 p, l d dual 4input nand buffer ttl mc74f40 14 n d ttl sn54ls40 sn74ls40 14 n,j d dual 4input nand gate cmos mc74ac20 14 n d cmos mc74act20 14 n d ttl mc74f20 14 n d cmos mc74hc20 14 n d ttl sn54ls20 sn74ls20 14 n,j d ttl sn54ls22 sn74ls22 14 n,j d cmos mc14012b 14 p, l d dual 4input nand gate (unbuffered) cmos mc14012ub 14 p, l d expandable nand gate dtl mc830 14 p, l hex and gate ecl mc10197 16 p, l fn lowvoltage cmos quad 2input and gate, 5vtolerant inputs cmos mc74lcx08 14 d,dt lowvoltage cmos quad 2input nand gate, 5vtolerant inputs cmos mc74lcx00 14 d,dt lowvoltage quiet cmos quad 2input nand gate cmos mc74lvq00 14 d,m, dt,sd quad 2input and gate cmos mc74ac08 14 n d cmos mc74act08 14 n d ttl mc74f08 14 n d cmos mc54hc08a mc74hc08a 14 n,j d,dt cmos mc74vhc08 14 d, dt,m ttl sn54ls08 sn74ls08 14 n,j d ttl sn54ls09 sn74ls09 14 n,j d ecl mc10h104 16 p, l fn ecl mc10104 16 p, l fn cmos mc14081b 14 p, l d quad 2input and gate with lsttlcompatible inputs cmos mc54hct08a mc74hct08a 14 n,j d quad 2input nand buffer ttl mc74f37 14 n d ttl sn54ls26 sn74ls26 14 n,j d ttl sn54ls37 sn74ls37 14 n,j d
motorola master selection guide logic: standard, special and programmable 3.122 selection by function description sm dip pins device(s) tech. gates, and/nand quad 2input nand buffer opencollector ttl mc74f38 14 n d quad 2input nand buffer opencollector ttl sn54ls38 sn74ls38 14 n,j d quad 2input nand gate dtl mc846 14 p, l dtl mc946 14 p, l cmos mc74ac00 14 n d cmos mc74act00 14 n d ttl mc74f00 14 n d cmos mc54hc00a mc74hc00a 14 n,j d,dt cmos mc74vhc00 14 d, dt,m ttl sn54ls00 sn74ls00 14 n,j d ttl sn54ls01 sn74ls01 14 n,j d ttl sn54ls03 sn74ls03 14 n,j d cmos mc14011b 14 p, l d quad 2input nand gate (unbuffered) cmos mc14011ub 14 p, l d quad 2input nand gate with lsttlcompatible inputs cmos mc54hct00a mc74hct00a 14 n,j d quad 2input nand gate with opendrain outputs cmos mc74hc03a 14 n d,dt triple 3input and gate cmos mc74ac11 14 n d cmos mc74act11 14 n d ttl mc74f11 14 n d cmos mc74hc11 14 n d ttl sn54ls11 sn74ls11 14 n,j d ttl sn54ls15 sn74ls15 14 n,j d cmos mc14073b 14 p, l d triple 3input nand gate cmos mc74ac10 14 n d cmos mc74act10 14 n d ttl mc74f10 14 n d cmos mc74hc10 14 n d ttl sn54ls10 sn74ls10 14 n,j d ttl sn54ls12 sn74ls12 14 n,j d cmos mc14023b 14 p, l d triple 3input nand gate (unbuffered) cmos mc14023ub 14 p, l d gates, complex 2input and/nand gate ecl mc10el04 mc100el04 8 d 2input differential and/nand gate ecl mc10el05 mc100el05 8 d ecl mc100lvel05 8 d 2input xor/nor gate ecl mc10el07 mc100el07 8 d 2wide, 2input/2wide, 3input andnor gate cmos mc74hc51 14 n d 2wide, 2input/2wide, 3input andor gate cmos mc74hc58 14 n d 2wide, 4input and/or invert gate ttl sn54ls55 sn74ls55 14 n,j d 3223input and/or invert gate ttl sn54ls54 sn74ls54 14 n,j d 4232 input andorinvert gate ttl mc74f64 14 n d 4bit and/or selector cmos mc14519b 16 p d 4input or/nor gate ecl mc10el01 mc100el01 8 d ecl mc100lvel01 8 d 4wide 4333 input orand gate ecl mc10h119 16 p, l fn 4wide orand/orandinvert gate ecl mc10h121 16 p, l fn 4wide orand/orandinvert gate ecl mc10121 16 p, l fn
motorola master selection guide logic: standard, special and programmable 3.123 selection by function description sm dip pins device(s) tech. gates, complex 8input nor/or gate cmos mc74hc4078 14 n d dual 2 wide 2input/3input and/or invert gate ttl sn54ls51 sn74ls51 14 n,j d dual 2wide 23input orand/orandinvert gate ecl mc10117 16 p, l fn ecl mc10h117 16 p, l fn dual 2wide 2input, 2wide 3input andorinvert gate ttl mc74f51 14 n d dual 2wide 3input orand gate ecl mc10h118 16 p, l fn dual 45 input or/nor gate ecl mc10h109 16 p, l fn ecl mc10109 16 p, l fn ecl mc10h209 16 p, l fn dual 4input nand, 2input nor/or, 8input and/nand gate (unbuffered) cmos mc14501ub 16 p d dual 4input or/nor gate ecl mc1660 16 l dual 5input majority logic gate cmos mc14530b 16 p d dual expandable and or invert gate (unbuffered) cmos mc14506ub 16 l hex nand/nor/invert gate (unbuffered) cmos mc14572ub 16 p d high speed dual 3input 3output or/nor gate ecl mc10212 16 p quad 4input or/nor gate ecl mc10e101 mc100e101 28 fn quad differential and/nand gate ecl mc10e404 mc100e404 28 fn quad or/nor gate ecl mc10h101 16 p, l fn ecl mc10101 16 p, l fn quint 2input and/nand gate ecl mc10e104 mc100e104 28 fn quint 2input xor/xnor gate ecl mc10e107 mc100e107 28 fn triple 232 input or/nor gate ecl mc10h105 16 p, l fn ecl mc10105 16 p, l fn triple 2input exclusive or/exclusive nor gate ecl mc10h107 16 p, l fn ecl mc10107 16 p, l fn gates, exclusive or/exclusive nor lowvoltage cmos quad 2input exclusive or gate with 5v tolerant inputs cmos mc74lcx86 14 d,m sd,dt quad 2input exclusive nor gate cmos mc74ac810 14 n dw cmos mc74act810 14 n dw cmos mc74hc7266 14 n d cmos mc74hc7266a 14 n d,dt ttl sn54ls266 sn74ls266 14 n,j d quad exclusive nor gate cmos mc14077b 14 p, l d quad 2input exclusive or gate cmos mc74ac86 14 n d cmos mc74act86 14 n d ttl mc74f86 14 n d cmos mc54hc86 mc74hc86 14 n,j d cmos mc54hc86a mc74hc86a 14 n,j d,dt ttl sn74ls136 14 n,j d ttl sn54ls386 sn74ls386 14 n,j d quad exclusive or gate ttl sn54ls86 sn74ls86 14 n,j d ecl mc10h113 16 p, l fn ecl mc10113 16 p, l fn cmos mc14070b 14 p, l d triple 2input exclusiveor gate ecl mc1672 16 l
motorola master selection guide logic: standard, special and programmable 3.124 selection by function description sm dip pins device(s) tech. gates, nor 8input nor gate cmos mc14078b 14 p d dual 3input 3output nor gate ecl mc10111 16 p, l fn ecl mc10h211 16 p, l fn ecl mc10211 16 p, l fn dual 4input nor gate cmos mc74hc4002 14 n d cmos mc14002b 14 p, l d dual 4input nor gate (unbuffered) cmos mc14002ub 14 p, l d dual 5input nor gate ttl sn54ls260 sn74ls260 14 n,j d lowvoltage cmos quad 2input nor gate, 5vtolerant inputs cmos mc74lcx02 14 d,dt quad 2input nor buffer ttl sn54ls28 sn74ls28 14 n,j d ttl sn54ls33 sn74ls33 14 n,j d quad 2input nor gate cmos mc74ac02 14 n d cmos mc74act02 14 n d ttl mc74f02 14 n d cmos mc54hc02a mc74hc02a 14 n,j d,dt cmos mc74vhc02 14 d, dt,m ttl sn54ls02 sn74ls02 14 n,j d ecl mc10h102 16 p, l fn ecl mc10102 16 p, l fn ecl mc1662 16 l cmos mc14001b 14 p, l d quad 2input nor gate (unbuffered) cmos mc14001ub 14 p, l d quad 2input nor gate with strobe ecl mc10h100 16 p, l fn triple 3input nor gate cmos mc54hc27 mc74hc27 14 n,j d ttl sn54ls27 sn74ls27 14 n,j d cmos mc14025b 14 p, l d triple 3input nor gate (unbuffered) cmos mc14025ub 14 p, l d triple 433 input nor gate ecl mc10h106 16 p, l fn ecl mc10106 16 p, l fn gates, or dual 3input 3output or gate ecl mc10110 16 p, l fn ecl mc10h210 16 p, l fn ecl mc10210 16 p, l fn dual 4input or gate cmos mc14072b 14 p d lowvoltage cmos quad 2input or gate, 5vtolerant inputs cmos mc74lcx32 14 d,dt lowvoltage quiet cmos quad 2input or gate, 5vtolerant inputs cmos mc74lvq32 14 d,m sd,dt quad 2input or gate cmos mc74ac32 14 n d cmos mc74act32 14 n d ttl mc74f32 14 n d cmos mc54hc32a mc74hc32a 14 n,j d,dt cmos mc74vhc32 14 d, dt,m cmos mc54hct32a mc74hct32a 14 n,j d ttl sn54ls32 sn74ls32 14 n,j d ecl mc10h103 16 p, l fn ecl mc10103 16 p, l fn cmos mc14071b 14 p, l d
motorola master selection guide logic: standard, special and programmable 3.125 selection by function description sm dip pins device(s) tech. gates, or triple 3input or gate cmos mc74hc4075 14 n d cmos mc14075b 14 p, l d industrial control unit industrial control unit cmos mc14500b 16 p dw inverters hex inverter dtl mc836 14 p dtl mc837 14 p dtl mc936 14 p, l dtl mc937 14 p, l hex inverter (without input diodes) dtl mc840 14 p inverter/buffers, 2state 9bit buffer ecl mc10e122 mc100e122 28 fn driver ecl mc10el12 mc100el12 8 d ecl mc100lvel12 8 d dual complementary pair plus inverter (unbuffered) cmos mc14007ub 14 p d hex buffer with enable ecl mc10h188 16 p, l fn ecl mc10188 16 p, l fn hex buffer/noninverting cmos mc14050b 16 p, l d hex inverter cmos mc74ac04 14 n d cmos mc74act04 14 n d ttl mc74f04 14 n d cmos mc54hc04a mc74hc04a 14 n,j d,sd, dt cmos mc74vhc04 14 d, dt,m ttl sn54ls04 sn74ls04 14 n,j d ttl sn54ls05 sn74ls05 14 n,j d hex inverter gate (unbuffered) cmos mc14069ub 14 p, l d hex inverter with enable ecl mc10h189 16 p, l fn ecl mc10189 16 p, l fn hex inverter with lsttl compatible inputs cmos mc74hct04a 14 n d,dt hex inverter with open drain outputs cmos mc74ac05 14 n d cmos mc74act05 14 n d hex inverter with strobe (active pullup) htl mc677 14 p, l hex inverter with strobe (without output resistors) htl mc678 14 p, l hex inverter/buffer ecl mc10195 16 p, l fn cmos mc14049b 16 p d hex inverter/buffer (unbuffered) cmos mc14049ub 16 p, l d hex inverting buffer/logiclevel down converter cmos mc54hc4049 mc74hc4049 16 n,j d hex noninverting buffer/logiclevel down converter cmos mc54hc4050 mc74hc4050 16 n,j d hex unbuffered inverter cmos mc74hcu04 14 n d cmos mc74hcu04a 14 n d,dt lowvoltage cmos hex inverter, with 5vtolerant inputs cmos mc74lcx04 14 d,dt lowvoltage quiet cmos hex inverter cmos mc74lvq04 14 d,m, sd,dt quad 2input gate (active pullup) htl mc672 14 p, l quad 2input gate (passive pullup) htl mc668 14 p, l quad driver ecl mc10e112 mc100e112 28 fn strobed hex inverter/buffer cmos mc14502b 16 p, l dw triple 3input gate (active pullup) htl mc671 14 p, l triple 3input gate (passive pullup) htl mc670 14 p, l
motorola master selection guide logic: standard, special and programmable 3.126 selection by function description sm dip pins device(s) tech. latches 3bit 4:1 muxlatch (integrated e156 & e171) ecl mc10e256 mc100e256 28 fn 3bit 4:1 muxlatch, with common enable, asynchronous master reset, differential output ecl mc10e156 mc100e156 28 fn 4bit d latch ttl sn54ls75 sn74ls75 16 n,j d ttl sn54ls77 sn74ls77 14 n,j d ttl sn54ls375 sn74ls375 16 n,j d 5bit 2:1 muxlatch, with common enable, asynchronous master reset differential output ecl mc10e154 mc100e154 28 fn 6bit 2:1 muxlatch, with common enable, asynchronous master reset single ended ecl mc10e155 mc100e155 28 fn 6bit d latch ecl mc10e150 mc100e150 28 fn 8bit addressable latch cmos mc74ac259 16 n d cmos mc74act259 16 n d ttl mc74f259 16 n d ttl sn54ls259 sn74ls259 16 n,j d cmos mc14099b 16 p dw cmos mc14599b 18 p 8bit bus compatible addressable latch cmos mc14598b 18 p, l 9bit latch, with parity ecl mc10e175 mc100e175 28 fn dual latch ecl mc10h130 16 p, l fn dual 2bit transparent latch cmos mc74hc75 16 n d dual 4bit addressable latch cmos mc74ac256 16 n dw cmos mc74act256 16 n dw ttl mc74f256 16 n d ttl sn54ls256 16 n,j d dual 4bit latch cmos mc14508b 24 p, l dw dual latch ecl mc10130 16 p, l fn lowvoltage cmos octal transparent latch, 3state, noninverting with 5v tolerant inputs and outputs cmos mc74lcx373 20 dw,m, dt lowvoltage cmos 16bit transparent latch, 3state, noninverting with 5v tolerant inputs and outputs cmos mc74lcx16373 48 dt lowvoltage cmos octal transparent latch flow through pinout, 3state, noninverting with 5v tolerant inputs and outputs cmos mc74lcx573 20 dw,m, sd,dt lowvoltage quiet cmos octal transparent latch cmos mc74lvq373 20 dw,m, sd,dt lowvoltage quiet cmos octal transparent latch flow through pinout cmos mc74lvq573 20 dw,m, sd,dt octal 3state noninverting transparent latch with lsttl compatible inputs cmos mc54hct373a mc74hct373a 20 n,j dw, sd,dt octal d latch with 3state outputs cmos mc74ac563 20 n dw cmos mc74act563 20 n dw cmos mc74ac573 20 n dw cmos mc74act573 20 n dw octal transparent latch with 3state outputs cmos mc74ac373 20 n dw cmos mc74act373 20 n dw ttl sn54ls373 sn74ls373 20 n,j dw ttl mc74f373 20 n dw ttl mc74f533 20 n dw cmos mc74ac533 20 n dw cmos mc74act533 20 n dw
motorola master selection guide logic: standard, special and programmable 3.127 selection by function description sm dip pins device(s) tech. latches octal with 3state outputs inverting transparent latch cmos mc54hc533a mc74hc533a 20 n,j dw cmos mc54hc563a mc74hc563a 20 n,j dw,dt octal with 3state outputs noninverting transparent latch cmos mc54hc373a mc74hc373a 20 n,j dw, dt,sd cmos mc74vhc373 20 dw, dt,m cmos mc54hc573a mc74hc573a 20 n,j dw cmos mc74vhc573 20 dw, dt,m octal with 3state outputs noninverting transparent latch with lsttl compatible inputs cmos mc74hct573a 20 n dw quad latch ecl mc10133 16 p, l fn ecl mc10153 16 p, l fn quad nand rs latch cmos mc14044b 16 p d quad nor rs latch cmos mc14043b 16 p, l d quad set/reset latch ttl sn54ls279 sn74ls279 16 n,j d quad transparent latch cmos mc14042b 16 p, l d quint latch ecl mc10h175 16 p, l fn ecl mc10175 16 p, l fn memory support 4bit eclttl load reducing dram driver ecl mc10h660 mc100h660 28 fn miscellaneous data separator ecl mc10e197 28 fn multiplexer/data selectors 1of8 decoder/demultiplexer cmos mc74ac151 16 n d cmos mc74act151 16 n d 16channel analog multiplexer/demultiplexer cmos mc14067b 24 p dw 16:1 multiplexer ecl mc10e164 mc100e164 28 fn 2bit 8:1 multiplexer ecl mc10e163 mc100e163 28 fn 2:1 multiplexer ecl mc10el58 mc100el58 8 d 3bit 4:1 multiplexer, with split select differential output ecl mc10e171 mc100e171 28 fn 4:1 differential multiplexer ecl mc10el57 mc100el57 16 d 5bit 2:1 multiplexer, with differential output ecl mc10e158 mc100e158 28 fn 8channel analog multiplexer/demultiplexer with address latch cmos mc54hc4351 mc74hc4351 20 n,j dw 8channel analog multiplexer/demultiplexer cmos mc54hc4051 mc74hc4051 16 n,j d, dw ,dt cmos mc14051b 16 p, l d 8channel data selector cmos mc14512b 16 p, l d 8input data selector/multiplexer cmos mc74hc151 16 n d 8input data selector/multiplexer with 3state outputs cmos mc54hc251 mc74hc251 16 n,j d 8input multiplexer ttl mc74f151 16 n d ttl sn54ls151 sn74ls151 16 n,j d 8input multiplexer with 3state outputs ttl sn54ls251 sn74ls251 16 n,j d ttl mc74f251 16 n d cmos mc74ac251 16 n d cmos mc74act251 16 n d 8input data selector/multiplexer with data and address latchs and with 3state outputs cmos mc54hc354 mc74hc354 20 n,j dw 8line multiplexer ecl mc10h164 16 p, l fn ecl mc10164 16 p, l fn analog multiplexer/demultiplexer with injection current effect control automotive customized cmos mc74hc4851a mc74hc4852a 16 n d,dw, dt gp p j control, automotive customized mc74hc4853a dt
motorola master selection guide logic: standard, special and programmable 3.128 selection by function description sm dip pins device(s) tech. multiplexer/data selectors dual 4channel analog data selector cmos mc14529b 16 p d dual 4channel analog multiplexer/demultiplexer cmos mc74hc4052 16 n d, dw cmos mc14052b 16 p, l d dual 4channel data selector/multiplexer cmos mc14539b 16 p d dual 4input data selector/multiplexer cmos mc74hc153 16 n d dual 4input data selector/multiplexer with 3state outputs cmos mc74hc253 16 n d dual 4input multiplexer cmos mc74ac153 16 n d cmos mc74act153 16 n d cmos mc74ac352 16 n dw cmos mc74act352 16 n dw ttl mc74f153 16 n d ttl mc74f352 16 n d ttl sn54ls153 sn74ls153 16 n,j d ttl sn54ls352 sn74ls352 16 n,j d dual 4input multiplexer with 3state outputs cmos mc74ac253 16 n dw cmos mc74act253 16 n dw cmos mc74ac353 16 n d cmos mc74act353 16 n d ttl sn54ls253 sn74ls253 16 n,j d ttl sn54ls353 sn74ls353 16 n,j d ttl mc74f253 16 n d ttl mc74f353 16 n d dual 4to1 multiplexer ecl mc10h174 16 p, l fn ecl mc10174 16 p, l fn dual differential 2:1 multiplexer (3.3v) ecl mc100lvel56 mc100el56 20 dw dual multiplexer with latch ecl mc10134 16 p, l fn low voltage 16:1 multiplexer ecl mc100lve164 32 fa lowvoltage cmos quad 2input, noninverting with 5v tolerant inputs and outputs cmos mc74lcx157 16 m,d, sd,dt quad 2input multiplexer with latch ecl mc10h173 16 p, l fn quad 2channel analog multiplexer/demultiplexer cmos mc14551b 16 p d quad 2input data selector/multiplexer cmos mc54hc158 mc74hc158 16 n,j d cmos mc74hc158a 16 n,j d,dt quad 2input data selector/multiplexer with 3state outputs cmos mc74hc257 16 n d quad 2input data selectors/multiplexers cmos mc54hc157a mc74hc157a 16 n,j d,dt cmos mc74vhc157 16 d, dt,m quad 2input data selector/multiplexer with lsttl compatible inputs cmos mc74hct157a 16 n d quad 2input multiplexer ttl mc74f157a 16 n d ttl mc74f158a 16 n d ttl sn54ls157 sn74ls157 16 n,j d ttl sn54ls158 sn74ls158 16 n,j d quad 2input multiplexer (inverting) ecl mc10159 16 p, l fn quad 2input multiplexer (noninverting) ecl mc10158 16 p, l fn quad 2input multiplexer inverting with 3state outputs cmos mc74ac258 16 n dw cmos mc74act258 16 n dw quad 2input multiplexer noninverting with 3state outputs cmos mc74act257 16 n d cmos mc74ac257 16 n d quad 2input multiplexer with 3state outputs ttl sn54ls257b sn74ls257b 16 n,j d quad 2input multiplexer with storage ttl sn54ls298 sn74ls298 16 n,j d
motorola master selection guide logic: standard, special and programmable 3.129 selection by function description sm dip pins device(s) tech. multiplexer/data selectors quad 2input multiplexer, inverting cmos mc74ac158 16 n d cmos mc74act158 16 n d quad 2input multiplexer, inverting output ecl mc10h159 16 p, l fn quad 2input multiplexer, inverting, with 3state outputs ttl sn54ls258b sn74ls258b 16 n,j d quad 2input multiplexer, noninverting cmos mc74ac157 16 n d cmos mc74act157 16 n d quad 2input multiplexer, noninverting output ecl mc10h158 16 p, l fn quad 2input multiplexer, with 3state outputs ttl mc74f257a 16 n d ttl mc74f258a 16 n d quad 2input multiplexer/latch ecl mc10173 16 p, l fn quad 2port register ttl mc74f398 20 n dw ttl mc74f399 16 n d ttl sn54ls398 sn74ls398 20 n,j dw ttl sn54ls399 sn74ls399 16 n,j d quad 2:1 mux, individualselect ecl mc10e157 mc100e157 28 fn quad analog switch/multiplexer cmos mc14016b 14 p, l d cmos mc14066b 14 p, l d quad analog switch/multiplexer/demultiplexer cmos mc54hc4016 mc74hc4016 14 n,j d cmos mc54hc4066 mc74hc4066 14 n,j d,dt quad analog switch/multiplexer/demultiplexer with separate analog/digital power supplies cmos mc74hc4316 16 n d triple 2channel analog multiplexer/demultiplexer cmos mc54hc4053 mc74hc4053 16 n,j d, dw cmos mc14053b 16 p, l d triple 2channel analog multiplexer/demultiplexer with address latch cmos mc54hc4353 mc74hc4353 20 n,j dw triple 2:1 multiplexer ecl mc100el59 20 dw triple 2:1 multiplexer (3.3v) ecl mc100lvel59 20 dw triple differential 2:1 multiplexer ecl mc100e457 28 fn ecl mc10e457 28 fn multivibrators 130mhz voltage controlled multivibrator ecl mc12101 20 p fn 200 mhz voltage controlled multivibrator ecl mc12100 20 p fn dual monostable multivibrator htl mc667 14 p, l cmos mc14528b 16 p, l d dual monstable multivibrators with schmitt trigger inputs ttl sn54ls221 sn74ls221 16 n,j d dual precision monostable multivibrator retriggerable, resettable) cmos mc54hc4538a mc74hc4538a 16 n,j d dual precision monostable multivibrator cmos mc14538b 16 p, l d, dw dual voltagecontrolled multivibrator ecl mc4024 14 p, l monostable multivibrator dtl mc951 14 p, l ecl mc10198 16 p, l fn retriggerable monostable multivibrators ttl sn54ls122 sn74ls122 14 n,j d ttl sn54ls123 sn74ls123 14 n,j d voltage controlled multivibrator ecl mc1658 16 p, l d,fn oscillators 7stage binary ripple counter cmos mc74hc4024 14 n d crystal oscillator ecl mc12061 16 p, l dual voltagecontrolled multivibrator ecl mc4324 14 p, l low power voltage controlled oscillator ecl mc12148 8 d,sd
motorola master selection guide logic: standard, special and programmable 3.130 selection by function description sm dip pins device(s) tech. oscillators voltage controlled oscillator ecl mc1648 14 p, l d,fn oscillator/timers 24stage frequency divider cmos mc14521b 16 p, l d programmable oscillator timer cmos mc14541b 14 p, l d programmable timer cmos mc14536b 16 p, l dw quad precision timer/driver cmos mc14415 16 p, l dw parity checkers 12bit parity generator/checker ecl mc10h160 16 p, l fn ecl mc10160 16 p, l fn 12bit parity generator/checker, registershiftable, diff output ecl mc10e160 mc100e160 28 fn 12bit parity tree cmos mc14531b 16 p d 9 + 2bit parity generatorchecker ecl mc10170 16 p, l fn 9bit odd/even parity generator/checker cmos mc74hc280 14 n d ttl sn54ls280 sn74ls280 14 n,j d 9bit parity generator/checker ttl mc74f280 14 n d error detection and correction circuit ecl mc10e193 mc100e193 28 fn phaselocked loop phaselocked loop cmos mc14046b 16 p, l dw prescalers 1.1ghz 10/20/40/80 prescaler ecl mc12080 8 p d 1.1ghz 126/128, 254/256 low power dual modulus prescaler ecl mc12058 8 d,sd 1.1ghz 127/128, 255/256 low power dual modulus prescaler ecl mc12038a 8 p d 1.1ghz 8/9, 16/17 dual modulus prescaler ecl mc12026a 8 p d ecl mc12026b 8 p d 1.1ghz 2 low power prescaler with standby mode ecl mc12083 8 p d 1.1ghz 2/4/8 low power prescaler with standby mode ecl mc12093 8 p d,sd 1.1ghz 256 prescaler ecl mc12074 8 p d 1.1ghz 32/33, 64/65 dual modulus prescaler ecl mc12028a 8 p d 1.1ghz 32/33, 64/65 dual modulus prescaler ecl mc12028b 8 p d 1.1ghz 64 prescaler ecl mc12073 8 p d 1.1ghz 64/65, 128/129 dual modulus prescaler ecl mc12022a 8 p d ecl mc12022b 8 p d ecl mc12022sla 8 p d ecl mc12022slb 8 p d ecl mc12022tsa 8 p d ecl mc12022tsb 8 p d 1.1ghz 64/65, 128/129 dual modulus prescaler with standby mode ecl mc12036a 8 p d y mode ecl mc12036b 8 p d 1.1ghz 64/65, 128/129 low voltage dual modulus prescaler ecl mc12022lva 8 p d ecl mc12022lvb 8 p d ecl mc12022tva 8 p d ecl mc12022tvb 8 p d 1.1ghz 64/65, 128/129 super low power dual modulus prescaler ecl mc12052a 8 d,sd 1.1ghz 64/65, 128/129 super low power dual modulus prescaler with standby mode ecl mc12053a 8 d,sd 1.3ghz 64 prescaler ecl mc12075 8 p d 1.3ghz 64/256 prescaler ecl mc12066 8 d
motorola master selection guide logic: standard, special and programmable 3.131 selection by function description sm dip pins device(s) tech. prescalers 1.3ghz 256 prescaler ecl mc12076 8 p d ecl mc12078 8 p d 2.0ghz 32/33, 64/65 dual modulus prescaler ecl mc12034a 8 p d ecl mc12034b 8 p d 2.0ghz 32/33, 64/65 low voltage dual modulus prescaler ecl mc12033a 8 p d ecl mc12033b 8 p d 2.0ghz 64/65, 128/129 dual modulus prescaler ecl mc12032a 8 p d ecl mc12032b 8 p d 2.0ghz 64/65, 128/129 low voltage dual modulus prescaler ecl mc12031a 8 p d ecl mc12031b 8 p d 2.0ghz 64/65, 128/129 super low power dual modulus prescaler ecl mc12054a 8 d,sd 2.5ghz 2, 4 low power prescaler with satndby mode ecl mc12095 8 d,sd 2.5ghz 8192 prescaler ecl mc12098 8 d 2.8ghz 64/128/256 prescaler ecl mc12079 8 p d ecl mc12089 8 p d 225mhz 20/21 dual modulus prescaler ecl mc12019 8 p, l d 225mhz 32/33 dual modulus prescaler ecl mc12015 8 p, l d 225mhz 40/41 dual modulus prescaler ecl mc12016 8 p, l d 225mhz 64 prescaler ecl mc12023 8 p d 225mhz 64/65 dual modulus prescaler ecl mc12017 8 p, l d 480mhz 5/6 dual modulus prescaler ecl mc12009 16 p, l 520mhz 128/129 dual modulus prescaler ecl mc12018 8 p, l d 520mhz 64/65 dual modulus prescaler ecl mc12025 8 p d 550mhz 10/11 dual modulus prescaler ecl mc12013 16 p, l 550mhz 8/9 dual modulus prescaler ecl mc12011 16 p, l 750mhz 2 uhf prescaler ecl mc12090 16 p, l programmable delay chips programmable delay chip (dig 80ps anal. 1.6 ps/mv) ecl mc10e196 mc100e196 28 fn programmable delay chip (digitally selectable 20ps res) ecl mc10e195 mc100e195 28 fn rams 1024 x 1bit random access memory ecl mcm10146 16 l 256 x 1bit random access memory ecl mcm10152 16 l receivers differential receiver ecl mc10el16 mc100el16 8 d ecl mc100lvel16 8 d high speed triple line receiver ecl mc10216 16 p, l fn lowvoltage quad differential line receiver ecl mc100lvel17 mc100el17 20 dw quad bus receiver ecl mc10129 16 l quad line receiver ecl mc10h115 16 p, l fn ecl mc10115 16 p, l fn ecl mc1692 16 l quint differential line receiver ecl mc10e116 mc100e116 28 fn ecl mc10e416 mc100e416 28 fn
motorola master selection guide logic: standard, special and programmable 3.132 selection by function description sm dip pins device(s) tech. receivers triple line receiver ecl mc10h116 16 p, l d,fn ecl mc10114 16 p, l fn ecl mc10116 16 p, l fn registers 4 x 4 multiport register cmos mc14580b 24 p, l d hex parallel d register with enable ttl mc74f378 16 n d register files 16 x 4bit register file (ram) ecl mc10h145 16 p, l fn 4 x 4 register file open collector ttl sn54ls170 sn74ls170 16 n,j d 4 x 4 register file with 3state outputs ttl sn54ls670 sn74ls670 16 n,j d 64bit register file (ram) ecl mcm10145 16 l 8 x 2 multiport register file (ram) ecl mcm10143 24 l schmitt triggers dual 4input nand schmitt trigger ttl mc74f13 14 n d ttl sn54ls13 sn74ls13 14 n,j d dual schmitt trigger cmos mc14583b 16 p d hex inverter schmitt trigger cmos mc74ac14 14 n d cmos mc74act14 14 n d ttl mc74f14 14 n d ttl sn54ls14 sn74ls14 14 n,j d hex schmitt trigger cmos mc14106b 14 p, l d cmos mc14584b 14 p, l d hex schmitt trigger inverter cmos mc54hc14a mc74hc14a 14 n,j d,dt cmos mc74vhc14 14 d, dt,m cmos mc54hct14a mc74hct14a 14 n,j d quad 2input nand gate with schmitt trigger inputs cmos mc54hc132a mc74hc132a 14 n,j d quad 2input nand schmitt trigger cmos mc74ac132 14 n d cmos mc74act132 14 n d ttl mc74f132 14 n d cmos mc14093b 14 p, l d quad 2input schmitt trigger nand gate ttl sn54ls132 sn74ls132 14 n,j d scsi bus terminators 9bit switchable active scsi2 bus term (110 w ) with volt reg cmos mccs142237 16,20 dw, dt 9bit switchable scsi bus term (220 w & 330 w : passive) cmos mccs142233 20 fn 18bit active scsi bus terminator (*also available in 32pin qfp package) cmos mccs142235 24,32 dw, *fa 18bit switchable active scsi2 bus term (110 w ) with volt reg cmos mccs142236 28 dw 18bit switchable active scsi2 bus term (110 w ) with volt reg plus inverted disconnect cmos mccs142238 28 dw 9bit switchable active scsi bus terminator (110 w ) with volt reg cmos mccs142239 16 d,dw serial eproms serial eprom for mpa1016: 8pin dip and soic; 20pin plcc cmos mpa1765 8,20 n d,fn serial eprom for mpa1036: 8pin dip and soic; 20pin plcc cmos mpa17128 8,20 p d,fn shift registers 1to64bit variable length shift register cmos mc14557b 16 p, l dw 128bit static shift register cmos mc14562b 14 p, l 18bit static shift register cmos mc14006b 14 p, l d 3bit scannable registered address driver, ecl ecl mc10e212 mc100e212 28 fn
motorola master selection guide logic: standard, special and programmable 3.133 selection by function description sm dip pins device(s) tech. shift registers 4bit bidirectional universal shift register cmos mc74ac194 16 n d cmos mc74act194 16 n d ttl mc74f194 16 n d cmos mc74hc194 16 n ttl sn54ls194a sn74ls194a 16 n,j d 4bit shift register ttl mc74f195 16 n d ttl sn54ls95b sn74ls95b 14 n,j d cmos mc14035b 16 p, l d 4bit shift register with 3state outputs ttl sn74ls395 16 n,j d 4bit shifter with 3state cmos mc74ac350 16 n d cmos mc74act350 16 n d 4bit shifter, with 3state outputs ttl mc74f350 16 n d 4bit universal shift register cmos mc74hc195 16 n ecl mc10h141 16 p, l fn ecl mc10141 16 p, l fn cmos mc14194b 16 p, l d 8bit bidirectional universal shift register with parallel i/o cmos mc74hc299 20 n dw 8bit paralleltoserial shift register ttl sn54ls165 sn74ls165 16 n,j d 8bit scannable register ecl mc10e241 mc100e241 28 fn 8bit serial inserial out shift register ttl mc74f164 14 n d 8bit serial or parallelinput/serialoutput shift register cmos mc54hc165 mc74hc165 16 n,j d 8bit serial or parallelinput/serialoutput shift register with 3 state o tp ts cmos mc54hc589 mc74hc589 16 n,j d ppg with 3state outputs cmos mc54hc589a mc74hc589a 16 n,j d,sd dt 8bit serial or parallelinput/serialoutput shift register with inp t latch cmos mc54hc597 mc74hc597 16 n,j d ppg input latch cmos mc54hc597a mc74hc597a 16 n,j d,dt 8bit serialin/parallelout shift register ttl sn54ls164 sn74ls164 14 n,j d 8bit serialinput/paralleloutput shift register cmos mc54hc164 mc74hc164 14 n,j d cmos mc54hc164a mc74hc164a 14 n,j d,dt 8bit serialinput/serial or paralleloutput shift register with latched 3state outputs cmos mc54hc595a mc74hc595a 16 n,j d,dt cmos mc74vhc595 16 d, dt,m 8bit shift register ecl mc10e141 mc100e141 28 fn ttl sn54ls166 sn74ls166 16 n,j d 8bit shift registers with sign extend ttl sn54ls322a sn74ls322a 20 n,j dw 8bit shift/storage register with 3state outputs ttl sn54ls299 sn74ls299 20 n,j dw ttl sn54ls323 sn74ls323 20 n,j dw 8bit static shift register cmos mc14014b 16 p, l d cmos mc14021b 16 p, l d 8input shift/storage register w/synchronous reset and common i/o pins ttl mc74f323 20 n dw 8input universal shift/storage register with common parallel i/o pins with 3 state o tp ts cmos mc74ac299 20 n dw pgg pins: with 3state outputs cmos mc74act299 20 n dw 8input universal shift/storage register with syn reset/common parallel i/o pins with 3 state o tp ts cmos mc74ac323 20 n dw pggy parallel i/o pins: with 3state outputs cmos mc74act323 20 n dw 8input universal shift/storage register, w/common parallel i/o pins ttl mc74f299 20 n dw 8stage shift/store register with 3state outputs cmos mc14094b 16 p, l d 9bit shift register, 700mhz, with asynchronous master reset ecl mc10e142 mc100e142 28 fn dual 5bit shift register cmos mc14015b 16 p, l d
motorola master selection guide logic: standard, special and programmable 3.134 selection by function description sm dip pins device(s) tech. shift registers dual 64bit static shift register cmos mc14517b 16 p dw successive approximation register cmos mc14549b 16 p, l dw cmos mc14559b 16 p, l dw universal 4bit shift register ttl sn54ls195a sn74ls195a 16 n,j d synthesizers 1.1ghz serial input synthesizer with 64/65, 128/129 prescaler ecl mc12202 16,20 d,m, dt 1251000mhz frequency synthesizer with parallel programming interface ecl mc12181 16 dt 2.0ghz serial input synthesizer with 64/65, 128/129 prescaler ecl mc12206 16,20 d,dt 2.5ghz serial input synthesizer with 32/33, 64/65 prescaler ecl mc12210 16,20 d,dt 2.7ghz frequency synthesizer ecl mc12179 8 d transceivers 25 w octal bidirectional transceiver w/ 3state inputs and outputs ecl mc74f2245 20 dw,sd 4bit differential ecl bus/ttl bus transceiver ecl mc10h680 mc100h680 28 fn dual supply octal translating transceiver cmos mc74lvx4245 24 dw,dt ecl/ttl inverting bidirectional transceivers with latch (4bit) ecl mc10804 16 l ecl/ttl inverting bidirectional transceivers with latch (5bit) ecl mc10805 20 l hex ecl/ttl transceiver with latches ecl mc10h681 mc100h681 28 fn lowvoltage cmos 16bit latching transceiver, 3state, noninverting with 5v tolerant inputs and outputs cmos mc74lcx16543a 56 dt lowvoltage cmos 16bit transceiver, 3state, noninverting with 5v tolerant inputs and outputs cmos mc74lcx16245 48 dt lowvoltage cmos 18bit universal bus transceiver, 3state, noninverting with 5v tolerant inputs and outputs cmos mc74lcx16500 56 dt cmos mc74lcx16501 56 dt lowvoltage cmos octal registered transceiver with dual output and clock enables, with 5v tolerant inputs and outputs cmos mc74lcx2952 24 dw, sd,dt lowvoltage cmos octal transceiver, 3state, noninverting with 5v tolerant inputs and outputs cmos mc74lcx245 20 m,dw, dt lowvoltage quiet cmos octal transceiver, 3state, noninverting cmos mc74lvq245 20 m,dw, sd,dt lowvoltage cmos octal transceiver/registered transceiver with 5v tolerant inputs and outputs cmos mc74lcx646 24 dw, sd,dt lowvoltage cmos octal transceiver/registered transceiver with dual enable, with 5v tolerant inputs and outputs cmos mc74lcx652 24 dw, dt lowvoltage quiet cmos octal transceiver/registered transceiver cmos mc74lvq646 24 dw, sd,dt lowvoltage quiet cmos octal transceiver/registered transceiver cmos mc74lvq652 24 dw, sd,dt octal bus transceiver/inverting with open collector ttl sn54ls642 sn74ls642 20 n,j dw octal bus transceiver/noninverting with open collector ttl sn54ls641 sn74ls641 20 n,j dw quad futurebus backplane transceiver, with 3state outputs and open collector ttl mc74f3893a 20 fn translators 9bit ecl/ttl translator ecl mc10h601 mc100h601 28 fn 9bit latch ecl/ttl translator ecl mc10h603 mc100h603 28 fn 9bit latch ttl/ecl translator ecl mc10h602 mc100h602 28 fn 9bit ttl/ecl translator ecl mc10h600 mc100h600 28 fn differential ecl/ttl translator ecl mc10elt25 mc100elt25 8 d differential pecl/ttl translator ecl mc10elt21 mc100elt21 8 d dual differential pecl/ttl translator ecl mc100elt23 8 d dual lvttl/lvcmos to differential pecl translator ecl mc100lvelt22 8 d dual ttl/differential pecl translator ecl mc10elt22 mc100elt22 8 d
motorola master selection guide logic: standard, special and programmable 3.135 selection by function description sm dip pins device(s) tech. translators ecl/ttl translator (single p.s. @+ 5.0v) ecl mc10h350 16 p, l fn hex ecl/mst translator ecl mc10191 16 p, l hex ttl or cmos/cmos hex level shifter cmos mc14504b 16 p, l d quad cmos/ecl translator (single p.s. @+ 5.0v) ecl mc10h352 20 p, l fn quad mecl/ttl translator ecl mc10h125 16 p, l fn ecl mc10125 16 p, l fn quad mst/ecl translator ecl mc10190 16 p quad ttl/ecl translator (ecl strobe) ecl mc10h424 16 p, l fn quad ttl/mecl translator ecl mc10124 16 p, l fn quad ttl/mecl translator, with ttl strobe input ecl mc10h124 16 p, l fn quad ttl/nmostopecl translator (single p.s. @+ 5.0v) ecl mc10h351 20 p, l fn registered hex ecl/ttl translator ecl mc10h605 mc100h605 28 fn registered hex pecl/ttl translator ecl mc10h607 mc100h607 28 fn registered hex ttl/ecl translator ecl mc10h604 mc100h604 28 fn registered hex ttl/pecl translator ecl mc10h606 mc100h606 28 fn triple mecl/nmos translator ecl mc10177 16 l triple ecl to pecl translator ecl mc100lvel90 mc100el90 20 dw triple pecl to lvpecl translator ecl mc100lvel92 20 dw triple pecl to ecl translator ecl mc100lvel91 20 dw ttl/differential ecl translator ecl mc10elt24 mc100elt24 8 d ttl/differential pecl translator ecl mc10elt20 mc100elt20 8 d ttl to differential pecl/differential pecl to ttl translator ecl mc10elt28 mc100elt28 8 d vco phaselockedloop with vco cmos mc74hc4046a 16 n d low power voltage controlled oscillator buffer cmos mc12147 8 d,sd low power voltage controlled oscillator buffer cmos mc12149 8 d,sd
device index motorola master selection guide ttl, ecl, cmos and special logic circuits 3.136 mc100e016 3.115 mc100e101 3.123 mc100e104 3.123 mc100e107 3.123 mc100e111 3.112 mc100e112 3.125 mc100e116 3.131 mc100e122 3.125 mc100e131 3.118 mc100e136 3.114 mc100e137 3.115 mc100e141 3.133 mc100e142 3.133 mc100e143 3.118 mc100e150 3.126 mc100e151 3.118 mc100e154 3.126 mc100e155 3.126 mc100e156 3.126 mc100e157 3.129 mc100e158 3.127 mc100e160 3.130 mc100e163 3.127 mc100e164 3.127 mc100e166 3.114 mc100e167 3.118 mc100e171 3.127 mc100e175 3.126 mc100e193 3.130 mc100e195 3.131 mc100e196 3.131 mc100e210 3.19 mc100e211 3.112 mc100e212 3.132 mc100e241 3.133 mc100e256 3.126 mc100e310 3.19 mc100e336 3.110 mc100e337 3.110 mc100e404 3.123 mc100e416 3.131 mc100e431 3.118 mc100e445 3.114 mc100e446 3.114 mc100e451 3.118 mc100e452 3.118 mc100e457 3.129 mc100el01 3.122 mc100el04 3.122 mc100el05 3.122 mc100el07 3.122 mc100el11 3.112 mc100el12 3.125 mc100el13 3.19 mc100el14 3.112 mc100el15 3.112 mc100el16 3.131 mc100el17 3.131 mc100el29 3.119 mc100el30 3.121 mc100el31 3.118 mc100el32 3.117 mc100el33 3.117 mc100el34 3.113 mc100el35 3.119 mc100el38 3.113 mc100el39 3.113 mc100el51 3.118 mc100el52 3.118 mc100el56 3.128 mc100el57 3.127 mc100el58 3.127 mc100el59 3.129 mc100el90 3.135 mc100elt20 3.135 mc100elt21 3.134 mc100elt22 3.134 mc100elt23 3.134 mc100elt24 3.135 mc100elt25 3.134 mc100elt28 3.135 mc100h600 3.134 mc100h601 3.134 mc100h602 3.134 mc100h603 3.134 mc100h604 3.135 mc100h605 3.135 mc100h606 3.135 mc100h607 3.135 mc100h640 3.113 mc100h641 3.113 mc100h642 3.113 mc100h643 3.113 mc100h644 3.113 mc100h646 3.113 mc100h660 3.127 mc100h680 3.134 mc100h681 3.134 mc100lve111 3.112 mc100lve164 3.128 mc100lve210 3.19 mc100lve222 3.113 mc100lve310 3.19 mc100lvel01 3.122 mc100lvel05 3.122 mc100lvel11 3.19 mc100lvel12 3.125 mc100lvel13 3.19 mc100lvel14 3.112 mc100lvel16 3.131 mc100lvel17 3.131 mc100lvel29 3.119 mc100lvel30 3.121 mc100lvel31 3.120 mc100lvel32 3.117 mc100lvel33 3.117 mc100lvel38 3.113 mc100lvel39 3.113 mc100lvel51 3.118 mc100lvel56 3.128 mc100lvel59 3.129 mc100lvel90 3.135 mc100lvel91 3.135 mc100lvel92 3.135 mc100lvelt22 3.134 mc100sx1230 3.118 mc10101 3.123 mc10102 3.124 mc10103 3.124 mc10104 3.121 mc10105 3.123 mc10106 3.124 mc10107 3.123 mc10109 3.123 mc10110 3.124 mc10111 3.124 mc10113 3.123 mc10114 3.132 mc10115 3.131 mc10116 3.132 mc10117 3.123 mc10121 3.122 mc10123 3.112 mc10124 3.135 mc10125 3.135 mc10129 3.131 mc10130 3.126 mc10131 3.119 mc10133 3.127 mc10134 3.128 mc10135 3.119 mc10136 3.116 mc10137 3.116
device index motorola master selection guide ttl, ecl, cmos and special logic circuits 3.137 mc10138 3.115 mc10141 3.133 mc10153 3.127 mc10154 3.115 mc10158 3.128 mc10159 3.128 mc10160 3.130 mc10161 3.116 mc10162 3.116 mc10163 3.117 mc10164 3.127 mc10165 3.118 mc10166 3.114 mc10170 3.130 mc10171 3.116 mc10172 3.117 mc10173 3.129 mc10174 3.128 mc10175 3.127 mc10176 3.119 mc10177 3.135 mc10178 3.115 mc10180 3.19 mc10181 3.19 mc10186 3.119 mc10188 3.125 mc10189 3.125 mc10190 3.135 mc10191 3.135 mc10192 3.112 mc10193 3.117 mc10195 3.125 mc10197 3.121 mc10198 3.129 mc10210 3.124 mc10211 3.124 mc10212 3.123 mc10216 3.131 mc10231 3.119 mc10804 3.134 mc10805 3.134 mc10e016 3.115 mc10e101 3.123 mc10e104 3.123 mc10e107 3.123 mc10e111 3.112 mc10e112 3.125 mc10e116 3.131 mc10e122 3.125 mc10e131 3.118 mc10e136 3.114 mc10e137 3.115 mc10e141 3.133 mc10e142 3.133 mc10e143 3.118 mc10e150 3.126 mc10e151 3.118 mc10e154 3.126 mc10e155 3.126 mc10e156 3.126 mc10e157 3.129 mc10e158 3.127 mc10e160 3.130 mc10e163 3.127 mc10e164 3.127 mc10e1651 3.114 mc10e1652 3.114 mc10e166 3.114 mc10e167 3.118 mc10e171 3.127 mc10e175 3.126 mc10e193 3.130 mc10e195 3.131 mc10e196 3.131 mc10e197 3.127 mc10e211 3.112 mc10e212 3.132 mc10e241 3.133 mc10e256 3.126 mc10e336 3.110 mc10e337 3.110 mc10e404 3.123 mc10e411 3.113 mc10e416 3.131 mc10e431 3.118 mc10e445 3.114 mc10e446 3.114 mc10e451 3.118 mc10e452 3.118 mc10e457 3.129 mc10el01 3.122 mc10el04 3.122 mc10el05 3.122 mc10el07 3.122 mc10el11 3.112 mc10el12 3.125 mc10el15 3.112 mc10el16 3.131 mc10el31 3.118 mc10el32 3.117 mc10el33 3.117 mc10el34 3.113 mc10el35 3.119 mc10el51 3.118 mc10el52 3.118 mc10el57 3.127 mc10el58 3.127 mc10el89 3.117 mc10elt20 3.135 mc10elt21 3.134 mc10elt22 3.134 mc10elt24 3.135 mc10elt25 3.134 mc10elt28 3.135 mc10h100 3.124 mc10h101 3.123 mc10h102 3.124 mc10h103 3.124 mc10h104 3.121 mc10h105 3.123 mc10h106 3.124 mc10h107 3.123 mc10h109 3.123 mc10h113 3.123 mc10h115 3.131 mc10h116 3.132 mc10h117 3.123 mc10h118 3.123 mc10h119 3.122 mc10h121 3.122 mc10h123 3.112 mc10h124 3.135 mc10h125 3.135 mc10h130 3.126 mc10h131 3.119 mc10h135 3.119 mc10h136 3.116 mc10h141 3.133 mc10h145 3.132 mc10h158 3.129 mc10h159 3.129 mc10h16 3.114 mc10h160 3.130 mc10h161 3.116 mc10h162 3.116 mc10h164 3.127 mc10h165 3.118 mc10h166 3.114 mc10h171 3.117 mc10h172 3.117 mc10h173 3.128 mc10h174 3.128 mc10h175 3.127 mc10h176 3.119 mc10h179 3.19 mc10h180 3.19
device index motorola master selection guide ttl, ecl, cmos and special logic circuits 3.138 mc10h181 3.19 mc10h186 3.119 mc10h188 3.125 mc10h189 3.125 mc10h209 3.123 mc10h210 3.124 mc10h211 3.124 mc10h330 3.112 mc10h332 3.110 mc10h334 3.112 mc10h350 3.135 mc10h351 3.135 mc10h352 3.135 mc10h423 3.112 mc10h424 3.135 mc10h600 3.134 mc10h601 3.134 mc10h602 3.134 mc10h603 3.134 mc10h604 3.135 mc10h605 3.135 mc10h606 3.135 mc10h607 3.135 mc10h640 3.113 mc10h641 3.113 mc10h642 3.113 mc10h643 3.113 mc10h644 3.113 mc10h645 3.113 mc10h646 3.113 mc10h660 3.127 mc10h680 3.134 mc10h681 3.134 mc10sx1125 3.19 mc10sx1130 3.113, 3.117 mc10sx1189 3.113 mc12002 3.117 mc12009 3.131 mc12011 3.131 mc12013 3.131 mc12014 3.115 mc12015 3.131 mc12016 3.131 mc12017 3.131 mc12018 3.131 mc12019 3.131 mc12022a 3.130 mc12022b 3.130 mc12022lva 3.130 mc12022lvb 3.130 mc12022sla 3.130 mc12022slb 3.130 mc12022tsa 3.130 mc12022tsb 3.130 mc12022tva 3.130 mc12022tvb 3.130 mc12023 3.131 mc12025 3.131 mc12026a 3.130 mc12026b 3.130 mc12028a 3.130 mc12028b 3.130 mc12031a 3.131 mc12031b 3.131 mc12032a 3.131 mc12032b 3.131 mc12033a 3.131 mc12033b 3.131 mc12034a 3.131 mc12034b 3.131 mc12036a 3.130 mc12036b 3.130 mc12038a 3.130 mc12040 3.117 mc12052a 3.130 mc12053a 3.130 mc12054a 3.131 mc12058 3.130 mc12061 3.129 mc12066 3.130 mc12073 3.130 mc12074 3.130 mc12075 3.130 mc12076 3.131 mc12078 3.131 mc12079 3.131 mc12080 3.130 mc12083 3.130 mc12089 3.131 mc12090 3.131 mc12093 3.130 mc12095 3.131 mc12098 3.131 mc12100 3.129 mc12101 3.129 mc12147 3.135 mc12148 3.129 mc12149 3.135 mc12179 3.134 mc12181 3.134 mc12202 3.134 mc12206 3.134 mc12210 3.134 mc12429 3.113 mc12430 3.113 mc12439 3.113 mc14001b 3.124 mc14001ub 3.124 mc14002b 3.124 mc14002ub 3.124 mc14006b 3.132 mc14007ub 3.125 mc14008b 3.19 mc14011b 3.122 mc14011ub 3.122 mc14012b 3.121 mc14012ub 3.121 mc14013b 3.118 mc14014b 3.133 mc14015b 3.133 mc14016b 3.129 mc14017b 3.115 mc14018b 3.115 mc14020b 3.114 mc14021b 3.133 mc14022b 3.115 mc14023b 3.122 mc14023ub 3.122 mc14024b 3.114 mc14025b 3.124 mc14025ub 3.124 mc14027b 3.119 mc14028b 3.116 mc14029b 3.115 mc14035b 3.133 mc14038b 3.19 mc14040b 3.114 mc14042b 3.127 mc14043b 3.127 mc14044b 3.127 mc14046b 3.130 mc14049b 3.125 mc14049ub 3.125 mc14050b 3.125 mc14051b 3.127 mc14052b 3.128 mc14053b 3.129 mc14060b 3.114 mc14066b 3.129 mc14067b 3.127 mc14068b 3.121 mc14069ub 3.125 mc14070b 3.123 mc14071b 3.124 mc14072b 3.124 mc14073b 3.122
device index motorola master selection guide ttl, ecl, cmos and special logic circuits 3.139 mc14075b 3.125 mc14076b 3.121 mc14077b 3.123 mc14078b 3.124 mc14081b 3.121 mc14082b 3.121 mc14093b 3.132 mc14094b 3.133 mc14099b 3.126 mc14106b 3.132 mc14161b 3.114 mc14163b 3.114 mc14174b 3.119 mc14175b 3.121 mc14194b 3.133 mc14415 3.130 mc14490 3.19 mc14500b 3.125 mc14501ub 3.123 mc14502b 3.125 mc14503b 3.110 mc14504b 3.135 mc14506ub 3.123 mc14508b 3.126 mc14510b 3.115 mc14511b 3.117 mc14512b 3.127 mc14513b 3.117 mc14514b 3.116 mc14515b 3.116 mc14516b 3.115 mc14517b 3.134 mc14518b 3.115 mc14519b 3.122 mc14520b 3.115 mc14521b 3.130 mc14522b 3.115 mc14526b 3.115 mc14527b 3.19 mc14528b 3.129 mc14529b 3.128 mc14530b 3.123 mc14531b 3.130 mc14532b 3.117 mc14534b 3.114 mc14536b 3.130 mc14538b 3.129 mc14539b 3.128 mc14541b 3.130 mc14543b 3.117 mc14544b 3.117 mc14547b 3.117 mc14549b 3.134 mc14551b 3.128 mc14553b 3.114 mc14555b 3.117 mc14556b 3.117 mc14557b 3.132 mc14558b 3.117 mc14559b 3.134 mc14560b 3.19 mc14561b 3.19 mc14562b 3.132 mc14566b 3.115 mc14568b 3.115 mc14569b 3.115 mc14572ub 3.123 mc14580b 3.132 mc14583b 3.132 mc14584b 3.132 mc14585b 3.114 mc14598b 3.126 mc14599b 3.126 mc1648 3.130 mc1650 3.114 mc1651 3.114 mc1658 3.129 mc1660 3.123 mc1662 3.124 mc1670 3.120 mc1672 3.123 mc1692 3.131 mc4016 3.116 mc4018 3.116 mc4024 3.129 mc4044 3.117 mc4316 3.116 mc4324 3.129 mc4344 3.117 mc54hc00a 3.122 mc54hc02a 3.124 mc54hc04a 3.125 mc54hc08a 3.121 mc54hc132a 3.132 mc54hc138a 3.116 mc54hc139a 3.117 mc54hc14a 3.132 mc54hc154 3.116 mc54hc157a 3.128 mc54hc158 3.128 mc54hc160 3.115 mc54hc161a 3.115 mc54hc162 3.115 mc54hc163a 3.115 mc54hc164 3.133 mc54hc164a 3.133 mc54hc165 3.133 mc54hc174a 3.119 mc54hc175 3.121 mc54hc175a 3.121 mc54hc240a 3.111 mc54hc241a 3.111 mc54hc244a 3.112 mc54hc245a 3.112 mc54hc251 3.127 mc54hc259 3.116 mc54hc27 3.124 mc54hc273a 3.120 mc54hc32a 3.124 mc54hc354 3.127 mc54hc365 3.110 mc54hc366 3.110 mc54hc367 3.110 mc54hc373a 3.127 mc54hc374a 3.120 mc54hc390 3.115 mc54hc393 3.115 mc54hc4016 3.129 mc54hc4040a 3.114 mc54hc4049 3.125 mc54hc4050 3.125 mc54hc4051 3.127 mc54hc4053 3.129 mc54hc4060 3.114 mc54hc4060a 3.114 mc54hc4066 3.129 mc54hc4351 3.127 mc54hc4353 3.129 mc54hc4538a 3.129 mc54hc533a 3.127 mc54hc534a 3.120 mc54hc540a 3.111 mc54hc541a 3.111 mc54hc563a 3.127 mc54hc573a 3.127 mc54hc574a 3.120 mc54hc589 3.133 mc54hc589a 3.133 mc54hc595a 3.133 mc54hc597 3.133 mc54hc597a 3.133 mc54hc640a 3.111 mc54hc646 3.112 mc54hc688 3.114 mc54hc74a 3.119 mc54hc86 3.123
device index motorola master selection guide ttl, ecl, cmos and special logic circuits 3.140 mc54hc86a 3.123 mc54hct00a 3.122 mc54hct08a 3.121 mc54hct14a 3.132 mc54hct161a 3.115 mc54hct163a 3.115 mc54hct241a 3.111 mc54hct244a 3.111 mc54hct245a 3.110 mc54hct32a 3.124 mc54hct373a 3.126 mc54hct374a 3.120 mc54hct574a 3.120 mc660 3.118 mc661 3.118 mc662 3.118 mc663 3.119 mc664 3.120 mc667 3.129 mc668 3.125 mc669 3.118 mc670 3.125 mc671 3.125 mc672 3.125 mc677 3.125 mc678 3.125 mc68150*33 3.110 mc68150*40 3.110 mc68194 3.112 mc74ac00 3.122 mc74ac02 3.124 mc74ac04 3.125 mc74ac05 3.125 mc74ac08 3.121 mc74ac10 3.122 mc74ac109 3.119 mc74ac11 3.122 mc74ac112 3.119 mc74ac113 3.119 mc74ac125 3.112 mc74ac126 3.112 mc74ac132 3.132 mc74ac138 3.116 mc74ac139 3.117 mc74ac14 3.132 mc74ac151 3.127 mc74ac153 3.128 mc74ac157 3.129 mc74ac158 3.129 mc74ac160 3.116 mc74ac161 3.116 mc74ac162 3.116 mc74ac163 3.116 mc74ac174 3.119 mc74ac175 3.120 mc74ac190 3.116 mc74ac194 3.133 mc74ac20 3.121 mc74ac240 3.111 mc74ac241 3.111 mc74ac244 3.111 mc74ac245 3.110 mc74ac251 3.127 mc74ac253 3.128 mc74ac256 3.126 mc74ac257 3.128 mc74ac258 3.128 mc74ac259 3.126 mc74ac273 3.120 mc74ac299 3.133 mc74ac32 3.124 mc74ac323 3.133 mc74ac350 3.133 mc74ac352 3.128 mc74ac353 3.128 mc74ac373 3.126 mc74ac374 3.120 mc74ac377 3.120 mc74ac378 3.118 mc74ac4020 3.114 mc74ac4040 3.114 mc74ac533 3.126 mc74ac534 3.120 mc74ac540 3.111 mc74ac541 3.111 mc74ac563 3.126 mc74ac564 3.120 mc74ac573 3.126 mc74ac574 3.120 mc74ac620 3.110 mc74ac623 3.110 mc74ac640 3.110 mc74ac643 3.110 mc74ac646 3.111 mc74ac648 3.111 mc74ac652 3.111 mc74ac74 3.118 mc74ac810 3.123 mc74ac86 3.123 mc74act00 3.122 mc74act02 3.124 mc74act04 3.125 mc74act05 3.125 mc74act08 3.121 mc74act10 3.122 mc74act109 3.119 mc74act11 3.122 mc74act112 3.119 mc74act113 3.119 mc74act125 3.112 mc74act126 3.112 mc74act132 3.132 mc74act138 3.116 mc74act139 3.117 mc74act14 3.132 mc74act151 3.127 mc74act153 3.128 mc74act157 3.129 mc74act158 3.129 mc74act160 3.116 mc74act161 3.116 mc74act162 3.116 mc74act163 3.116 mc74act174 3.119 mc74act175 3.120 mc74act194 3.133 mc74act20 3.121 mc74act240 3.111 mc74act241 3.111 mc74act244 3.111 mc74act245 3.110 mc74act251 3.127 mc74act253 3.128 mc74act256 3.126 mc74act257 3.128 mc74act258 3.128 mc74act259 3.126 mc74act273 3.120 mc74act299 3.133 mc74act32 3.124 mc74act323 3.133 mc74act350 3.133 mc74act352 3.128 mc74act353 3.128 mc74act373 3.126 mc74act374 3.120 mc74act377 3.120 mc74act378 3.118 mc74act521 3.114 mc74act533 3.126 mc74act534 3.120 mc74act540 3.111 mc74act541 3.111 mc74act563 3.126 mc74act564 3.120 mc74act573 3.126
device index motorola master selection guide ttl, ecl, cmos and special logic circuits 3.141 mc74act574 3.120 mc74act620 3.110 mc74act623 3.110 mc74act640 3.110 mc74act643 3.110 mc74act646 3.111 mc74act648 3.111 mc74act652 3.111 mc74act74 3.118 mc74act810 3.123 mc74act86 3.123 mc74f00 3.122 mc74f02 3.124 mc74f04 3.125 mc74f08 3.121 mc74f10 3.122 mc74f109 3.119 mc74f11 3.122 mc74f112 3.119 mc74f1245 3.110 mc74f125 3.112 mc74f126 3.112 mc74f13 3.132 mc74f132 3.132 mc74f138 3.116 mc74f139 3.117 mc74f14 3.132 mc74f148 3.118 mc74f151 3.127 mc74f153 3.128 mc74f157a 3.128 mc74f158a 3.128 mc74f160a 3.115 mc74f161a 3.115 mc74f162a 3.115 mc74f163a 3.115 mc74f164 3.133 mc74f168 3.114 mc74f169 3.114 mc74f174 3.119 mc74f175 3.120 mc74f1803 3.113 mc74f181 3.19 mc74f182 3.19 mc74f194 3.133 mc74f195 3.133 mc74f20 3.121 mc74f21 3.121 mc74f2245 3.134 mc74f240 3.111 mc74f241 3.111 mc74f242 3.112 mc74f243 3.112 mc74f244 3.111 mc74f245 3.110 mc74f251 3.127 mc74f253 3.128 mc74f256 3.126 mc74f257a 3.129 mc74f258a 3.129 mc74f259 3.126 mc74f269 3.115 mc74f280 3.130 mc74f283 3.19 mc74f299 3.133 mc74f32 3.124 mc74f323 3.133 mc74f350 3.133 mc74f352 3.128 mc74f353 3.128 mc74f365 3.110 mc74f366 3.110 mc74f367 3.110 mc74f368 3.110 mc74f37 3.121 mc74f373 3.126 mc74f374 3.120 mc74f377 3.120 mc74f378 3.132 mc74f379 3.121 mc74f38 3.122 mc74f381 3.19 mc74f382 3.19 mc74f3893a 3.134 mc74f398 3.129 mc74f399 3.129 mc74f40 3.121 mc74f51 3.123 mc74f521 3.114 mc74f533 3.126 mc74f534 3.120 mc74f537 3.116 mc74f538 3.116 mc74f539 3.116 mc74f544 3.111 mc74f568 3.114 mc74f569 3.114 mc74f574 3.120 mc74f579 3.115 mc74f620 3.111 mc74f623 3.111 mc74f64 3.122 mc74f640 3.111 mc74f646 3.111 mc74f657a 3.110 mc74f657b 3.110 mc74f74 3.119 mc74f779 3.115 mc74f803 3.113 mc74f823 3.110 mc74f827 3.110 mc74f828 3.110 mc74f85 3.114 mc74f86 3.123 mc74hc00a 3.122 mc74hc02a 3.124 mc74hc03a 3.122 mc74hc04a 3.125 mc74hc08a 3.121 mc74hc10 3.122 mc74hc107 3.119 mc74hc109 3.119 mc74hc11 3.122 mc74hc112 3.119 mc74hc125a 3.112 mc74hc132a 3.132 mc74hc133 3.121 mc74hc137 3.116 mc74hc138a 3.116 mc74hc139a 3.117 mc74hc147 3.118 mc74hc14a 3.132 mc74hc151 3.127 mc74hc153 3.128 mc74hc154 3.116 mc74hc157a 3.128 mc74hc158 3.128 mc74hc158a 3.128 mc74hc160 3.115 mc74hc161a 3.115 mc74hc162 3.115 mc74hc163 3.115 mc74hc164 3.133 mc74hc164a 3.133 mc74hc165 3.133 mc74hc173 3.121 mc74hc174a 3.119 mc74hc175 3.121 mc74hc175a 3.121 mc74hc194 3.133 mc74hc195 3.133 mc74hc20 3.121 mc74hc237 3.116 mc74hc240a 3.111 mc74hc241a 3.111 mc74hc242 3.112
device index motorola master selection guide ttl, ecl, cmos and special logic circuits 3.142 mc74hc244a 3.112 mc74hc245a 3.112 mc74hc251 3.127 mc74hc253 3.128 mc74hc257 3.128 mc74hc259 3.116 mc74hc27 3.124 mc74hc273a 3.120 mc74hc280 3.130 mc74hc299 3.133 mc74hc30 3.121 mc74hc32a 3.124 mc74hc354 3.127 mc74hc365 3.110 mc74hc366 3.110 mc74hc367 3.110 mc74hc368 3.110 mc74hc373a 3.127 mc74hc374a 3.120 mc74hc390 3.115 mc74hc393 3.115 mc74hc4002 3.124 mc74hc4016 3.129 mc74hc4017 3.115 mc74hc4020a 3.114 mc74hc4024 3.129 mc74hc4040a 3.114 mc74hc4046a 3.135 mc74hc4049 3.125 mc74hc4050 3.125 mc74hc4051 3.127 mc74hc4052 3.128 mc74hc4053 3.129 mc74hc4060 3.114 mc74hc4060a 3.114 mc74hc4066 3.129 mc74hc4075 3.125 mc74hc4078 3.123 mc74hc42 3.116 mc74hc4316 3.129 mc74hc4351 3.127 mc74hc4353 3.129 mc74hc4511 3.117 mc74hc4514 3.116 mc74hc4538a 3.129 mc74hc4851a 3.127 mc74hc4852a 3.127 mc74hc4853a 3.127 mc74hc51 3.122 mc74hc533a 3.127 mc74hc534a 3.120 mc74hc540a 3.111 mc74hc541a 3.111 mc74hc563a 3.127 mc74hc564a 3.120 mc74hc573a 3.127 mc74hc574a 3.120 mc74hc58 3.122 mc74hc589 3.133 mc74hc589a 3.133 mc74hc595a 3.133 mc74hc597 3.133 mc74hc597a 3.133 mc74hc640a 3.111 mc74hc646 3.112 mc74hc688 3.114 mc74hc7266 3.123 mc74hc7266a 3.123 mc74hc73 3.119 mc74hc74a 3.119 mc74hc75 3.126 mc74hc76 3.119 mc74hc85 3.114 mc74hc86 3.123 mc74hc86a 3.123 mc74hct00a 3.122 mc74hct04a 3.125 mc74hct08a 3.121 mc74hct138a 3.116 mc74hct14a 3.132 mc74hct157a 3.128 mc74hct161a 3.115 mc74hct163a 3.115 mc74hct174a 3.119 mc74hct240a 3.111 mc74hct241a 3.111 mc74hct244a 3.111 mc74hct245a 3.110 mc74hct273a 3.120 mc74hct32a 3.124 mc74hct373a 3.126 mc74hct374a 3.120 mc74hct541a 3.111 mc74hct573a 3.127 mc74hct574a 3.120 mc74hct74a 3.119 mc74hcu04 3.125 mc74hcu04a 3.125 mc74lcx00 3.121 mc74lcx02 3.124 mc74lcx04 3.125 mc74lcx08 3.121 mc74lcx125 3.19 mc74lcx138 3.117 mc74lcx157 3.128 mc74lcx16240a 3.19 mc74lcx16244 3.19 mc74lcx16245 3.134 mc74lcx16373 3.126 mc74lcx373 3.126 mc74lcx16374 3.120 mc74lcx16500 3.134 mc74lcx16501 3.134 mc74lcx16543a 3.134 mc74lcx240 3.19 mc74lcx244 3.19 mc74lcx245 3.134 mc74lcx2952 3.134 mc74lcx32 3.124 mc74lcx374 3.120 mc74lcx540 3.19 mc74lcx541 3.19 mc74lcx573 3.126 mc74lcx574 3.120 mc74lcx652 3.134 mc74lcx86 3.123 mc74lvq00 3.121 mc74lvq04 3.125 mc74lvq125 3.110 mc74lvq138 3.117 mc74lvq240 3.110 mc74lvq244 3.19 mc74lvq245 3.134 mc74lvq32 3.124 mc74lvq373 3.126 mc74lvq374 3.120 mc74lvq541 3.19 mc74lvq573 3.126 mc74lvq574 3.120 mc74lvq646 3.134 mc74lvq652 3.134 mc74lvx4245 3.134 mc74vhc02 3.124 mc74vhc04 3.125 mc74vhc08 3.121 mc74hc126a 3.112 mc74vhc125 3.112 mc74vhc138 3.116 mc74vhc14 3.132 mc74vhc157 3.128 mc74vhc244 3.112 mc74vhc245 3.112 mc74vhc32 3.124 mc74vhc373 3.127 mc74vhc374 3.120 mc74vhc541 3.111
device index motorola master selection guide ttl, ecl, cmos and special logic circuits 3.143 mc74vhc573 3.127 mc74vhc574 3.120 mc74vhc595 3.133 mc74vhc74 3.119 mc830 3.121 mc832 3.19 mc836 3.125 mc837 3.125 mc840 3.125 mc844 3.118 mc845 3.118 mc846 3.122 mc88913 3.113 mc88914 3.113 mc88915*55 3.113 mc88915*70 3.113 mc88915t*100 3.113 mc88915t*133 3.113 mc88915t*160 3.113 mc88915t*55 3.113 mc88915t*70 3.113 mc88916*70 3.113 mc88916*80 3.113 mc88920 3.113 mc88921 3.113 mc88lv926 3.113 mc88pl117 3.113 mc936 3.125 mc937 3.125 mc944 3.118 mc945 3.118 mc946 3.122 mc951 3.129 mc952 3.119 mc953 3.119 mccs142233 3.132 mccs142235 3.132 mccs142236 3.132 mccs142237 3.132 mccs142238 3.132 mccs142239 3.132 mch12140 3.117 mck12140 3.117 mcm10143 3.132 mcm10145 3.132 mcm10146 3.131 mcm10152 3.131 mpa1016 3.118 mpa1036 3.118 mpa1064 3.118 mpa1100 3.118 mpa17128 3.132 mpa1765 3.132 mpc903 3.112 mpc904 3.112 mpc905 3.112 mpc911 3.113 mpc930 3.113 mpc931 3.113 mpc946 3.113 mpc947 3.112 mpc948 3.112 mpc948l 3.112 mpc949 3.113 mpc950 3.113 mpc951 3.113 mpc952 3.113 mpc956 3.113 mpc970 3.113 mpc972 3.113 mpc973 3.113 mpc974 3.113 mpc980 3.113 mpc990 3.113 mpc991 3.113 mpc992 3.113 sn54ls00 3.122 sn54ls01 3.122 sn54ls02 3.124 sn54ls03 3.122 sn54ls04 3.125 sn54ls05 3.125 sn54ls08 3.121 sn54ls09 3.121 sn54ls10 3.122 sn54ls107a 3.119 sn54ls109a 3.119 sn54ls11 3.122 sn54ls112a 3.119 sn54ls113a 3.119 sn54ls114a 3.119 sn54ls12 3.122 sn54ls122 3.129 sn54ls123 3.129 sn54ls125a 3.112 sn54ls126a 3.112 sn54ls13 3.132 sn54ls132 3.132 sn54ls133 3.121 sn54ls137 3.116 sn54ls138 3.116 sn54ls139 3.117 sn54ls14 3.132 sn54ls145 3.116 sn54ls147 3.117 sn54ls148 3.118 sn54ls15 3.122 sn54ls151 3.127 sn54ls153 3.128 sn54ls155 3.116 sn54ls156 3.116 sn54ls157 3.128 sn54ls158 3.128 sn54ls160a 3.114 sn54ls161a 3.114 sn54ls162a 3.114 sn54ls163a 3.114 sn54ls164 3.133 sn54ls165 3.133 sn54ls166 3.133 sn54ls168 3.115 sn54ls169 3.115 sn54ls170 3.132 sn54ls173a 3.118 sn54ls174 3.119 sn54ls175 3.121 sn54ls190 3.115 sn54ls191 3.115 sn54ls192 3.115 sn54ls193 3.115 sn54ls194a 3.133 sn54ls195a 3.134 sn54ls196 3.114 sn54ls197 3.114 sn54ls20 3.121 sn54ls21 3.121 sn54ls22 3.121 sn54ls221 3.129 sn54ls240 3.111 sn54ls241 3.111 sn54ls242 3.112 sn54ls243 3.112 sn54ls244 3.111 sn54ls245 3.111 sn54ls247 3.117 sn54ls248 3.117 sn54ls249 3.117 sn54ls251 3.127 sn54ls253 3.128 sn54ls256 3.126 sn54ls257b 3.128 sn54ls258b 3.129 sn54ls259 3.126 sn54ls26 3.121 sn54ls260 3.124 sn54ls266 3.123
device index motorola master selection guide ttl, ecl, cmos and special logic circuits 3.144 sn54ls27 3.124 sn54ls273 3.120 sn54ls279 3.127 sn54ls28 3.124 sn54ls280 3.130 sn54ls283 3.19 sn54ls290 3.115 sn54ls293 3.114 sn54ls298 3.128 sn54ls299 3.133 sn54ls30 3.121 sn54ls32 3.124 sn54ls322a 3.133 sn54ls323 3.133 sn54ls33 3.124 sn54ls348 3.118 sn54ls352 3.128 sn54ls353 3.128 sn54ls365a 3.110 sn54ls366a 3.110 sn54ls367a 3.110 sn54ls368a 3.110 sn54ls37 3.121 sn54ls373 3.126 sn54ls374 3.120 sn54ls375 3.126 sn54ls377 3.120 sn54ls378 3.119 sn54ls379 3.118 sn54ls38 3.122 sn54ls386 3.123 sn54ls390 3.115 sn54ls393 3.115 sn54ls398 3.129 sn54ls399 3.129 sn54ls40 3.121 sn54ls42 3.116 sn54ls47 3.117 sn54ls48 3.117 sn54ls490 3.115 sn54ls51 3.123 sn54ls54 3.122 sn54ls540 3.111 sn54ls541 3.111 sn54ls55 3.122 sn54ls569a 3.114 sn54ls623 3.111 sn54ls640 3.111 sn54ls641 3.134 sn54ls642 3.134 sn54ls645 3.111 sn54ls669 3.116 sn54ls670 3.132 sn54ls682 3.114 sn54ls684 3.114 sn54ls688 3.114 sn54ls73a 3.119 sn54ls748 3.118 sn54ls74a 3.119 sn54ls75 3.126 sn54ls76a 3.119 sn54ls77 3.126 sn54ls795 3.110 sn54ls796 3.110 sn54ls797 3.110 sn54ls798 3.110 sn54ls83a 3.19 sn54ls848 3.118 sn54ls85 3.114 sn54ls86 3.123 sn54ls90 3.115 sn54ls92 3.115 sn54ls93 3.114 sn54ls95b 3.133 sn74ls00 3.122 sn74ls01 3.122 sn74ls02 3.124 sn74ls03 3.122 sn74ls04 3.125 sn74ls05 3.125 sn74ls08 3.121 sn74ls09 3.121 sn74ls10 3.122 sn74ls107a 3.119 sn74ls109a 3.119 sn74ls11 3.122 sn74ls112a 3.119 sn74ls113a 3.119 sn74ls114a 3.119 sn74ls12 3.122 sn74ls122 3.129 sn74ls123 3.129 sn74ls125a 3.112 sn74ls126a 3.112 sn74ls13 3.132 sn74ls132 3.132 sn74ls133 3.121 sn74ls136 3.123 sn74ls137 3.116 sn74ls138 3.116 sn74ls139 3.117 sn74ls14 3.132 sn74ls145 3.116 sn74ls147 3.117 sn74ls148 3.118 sn74ls15 3.122 sn74ls151 3.127 sn74ls153 3.128 sn74ls155 3.116 sn74ls156 3.116 sn74ls157 3.128 sn74ls158 3.128 sn74ls160a 3.114 sn74ls161a 3.114 sn74ls162a 3.114 sn74ls163a 3.114 sn74ls164 3.133 sn74ls165 3.133 sn74ls166 3.133 sn74ls168 3.115 sn74ls169 3.115 sn74ls170 3.132 sn74ls173a 3.118 sn74ls174 3.119 sn74ls175 3.121 sn74ls190 3.115 sn74ls191 3.115 sn74ls192 3.115 sn74ls193 3.115 sn74ls194a 3.133 sn74ls195a 3.134 sn74ls196 3.114 sn74ls197 3.114 sn74ls20 3.121 sn74ls21 3.121 sn74ls22 3.121 sn74ls221 3.129 sn74ls240 3.111 sn74ls241 3.111 sn74ls242 3.112 sn74ls243 3.112 sn74ls244 3.111 sn74ls245 3.111 sn74ls247 3.117 sn74ls248 3.117 sn74ls249 3.117 sn74ls251 3.127 sn74ls253 3.128 sn74ls257b 3.128 sn74ls258b 3.129 sn74ls259 3.126 sn74ls26 3.121 sn74ls260 3.124 sn74ls266 3.123 sn74ls27 3.124 sn74ls273 3.120
device index motorola master selection guide ttl, ecl, cmos and special logic circuits 3.145 sn74ls279 3.127 sn74ls28 3.124 sn74ls280 3.130 sn74ls283 3.19 sn74ls290 3.115 sn74ls293 3.114 sn74ls298 3.128 sn74ls299 3.133 sn74ls30 3.121 sn74ls32 3.124 sn74ls322a 3.133 sn74ls323 3.133 sn74ls33 3.124 sn74ls348 3.118 sn74ls352 3.128 sn74ls353 3.128 sn74ls365a 3.110 sn74ls366a 3.110 sn74ls367a 3.110 sn74ls368a 3.110 sn74ls37 3.121 sn74ls373 3.126 sn74ls374 3.120 sn74ls375 3.126 sn74ls377 3.120 sn74ls378 3.119 sn74ls379 3.118 sn74ls38 3.122 sn74ls386 3.123 sn74ls390 3.115 sn74ls393 3.115 sn74ls395 3.133 sn74ls398 3.129 sn74ls399 3.129 sn74ls40 3.121 sn74ls42 3.116 sn74ls47 3.117 sn74ls48 3.117 sn74ls490 3.115 sn74ls51 3.123 sn74ls54 3.122 sn74ls540 3.111 sn74ls541 3.111 sn74ls55 3.122 sn74ls569a 3.114 sn74ls623 3.111 sn74ls640 3.111 sn74ls641 3.134 sn74ls642 3.134 sn74ls645 3.111 sn74ls669 3.116 sn74ls670 3.132 sn74ls682 3.114 sn74ls684 3.114 sn74ls688 3.114 sn74ls73a 3.119 sn74ls748 3.118 sn74ls74a 3.119 sn74ls75 3.126 sn74ls76a 3.119 sn74ls77 3.126 sn74ls795 3.110 sn74ls796 3.110 sn74ls797 3.110 sn74ls798 3.110 sn74ls83a 3.19 sn74ls848 3.118 sn74ls85 3.114 sn74ls86 3.123 sn74ls90 3.115 sn74ls92 3.115 sn74ls93 3.114 sn74ls95b 3.133
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.146 ordering information device nomenclatures ls low power schottky standard prefix temperature range ? 74 series (0 to +70 c) ? 54 series (55 to +125 c) family ? ls = low power schottky package type ? n for plastic (74 series only) ? j for ceramic ? d for 150 mil plastic soic (74 series only) ? dw for 300 mil plastic soic (74 series only) function type sn vv ww xxxx y fast motorola circuit identifier temperature range ? 74 series (0 to +70 c) family ? f = fast package type ? n for plastic (74 series only) ? d for 150 mil plastic soic (74 series only) ? dw for 300 mil plastic soic (74 series only) ? sd for plastic ssop function type mc vv w xxxx y mecl 10k, mecl 10h/100h motorola circuit identifier temperature range ? 10 = 10k (30 to +85 c) ? 10h = 10h (0 to +75 c) ? 100h = 100k compatible (0 to +85 c) package type ? p for plastic ? l for ceramic ? fn for plcc function type mc www xxx yy
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.147 eclinps, eclinps lite xxx motorola circuit identifier compatibility identifier ? 10 = 10h compatible (0 to +85 c) ? 100 = 100k compatible (0 to +85 c) package type ? fn = plcc ? d = plastic soic ? l = ceramic dip ? p = plastic dip function type mc www yyy zz eclinps family identifier ? yyy = 3digits for eclinps ? yy= 2digits for eclinps lite ? e = eclinps ? el = eclinps lite ? elt = eclinps lite translator ? lve = low voltage eclinps ? lvel = low voltage eclinps lite ? mc = fully qualified circuit ? xc = non reliability qualified metal gate 14000 series cmos mc 14xxx zz yy motorola circuit identifier package and temperature range ? cl for ceramic 55 to +125 c ? cp for plastic 55 to +125 c ? d/dw for small outline package (plastic) 55 to +125 c ? dt for plastic tssop function type identifier (per jedec standard) ? b (or blank)= buffered outputs ? ub = unbuffered outputs highspeed cmos motorola circuit identifier temperature range ? 74 series (55 to +125 c) ? 54 series (55 to +125 c) highspeed cmos specification identifier ? hc = buffered highspeed cmos ? hcu = unbuffered highspeed cmos* ? hct = highspeed cmos ttl compatible *not available on all devices package type ? n for plastic (74 series only) ? j for ceramic (54 series only) ? d for 150 mil plastic soic (74 series only) ? dw for 300 mil plastic soic (74 series only) ? sd for plastic ssop ? dt for plastic tssop function type ? xx(x) same function and pin configuration as lsttl ? 4xxx same function and pin configuration as cmos 14000 ? 7xx(x) variation of lsttl or cmos 14000 device mc vv www xxxx y fact motorola circuit identifier temperature range family ? 74ac = fact (40 to +85 c) ? 74act = ttl compatible (40 to +85 c) package type ? n for plastic ? d for narrow soic ? dw for wide soic ? sd for plastic ssop ? dt for plastic tssop function type mc wwwww xxx yy
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.148 other logic circuits ? n for plastic ? d for narrow soic ? fn for plcc ? fj for clcc motorola circuit identifier function type package type option type mc/mccs wwwwww x yy zz option suffix indicator ? mc = standard circuit identifier ? mccs = circuit chipset identifier mecl iii/htl/dtl motorola circuit identifier package type ? p for plastic ? l for ceramic ? d for narrow soic ? fn for plcc function type mc xxxx y lcx products motorola circuit identifier temperature range ? 74 = 40 to +85 c family identifier ? lcx = 5vtolerant lowvoltage cmos package type ? d for plastic narrow jedec soic ? dw for plastic wide jedec soic ? m for plastic eiaj soic ? sd for plastic ssop ? dt for plastic tssop function type mc 74 lcx yyyyy zz lvq products motorola circuit identifier temperature range ? 74 = 40 to +85 c family identifier ? lvq =lowvoltage quiet cmos package type ? d for plastic narrow jedec soic ? dw for plastic wide jedec soic ? m for plastic eiaj soic ? sd for plastic ssop ? dt for plastic tssop function type mc 74 lvq yyyy zz
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.149 motorola programmable arrays (mpa) prom type ? blank = eprom ? c = eeprom motorola programmable array (first series) circuit identifier mpa1 xxx yy i number of core cells physical number of cells in 100's ? 016 = 1,600 cells ? 036 = 3,600 cells ? 064 = 6,400 cells ? 100 = 10,000 cells package type ? fn = 84 plcc ? dd = 128 pqfp ? dh = 160 pqfp ? dk = 208 pqfp ? hi = 181 cpga ? ke = 224 cpga ? hv = 299 cpga ? bg = 256 pbga speed grade temperature grade ? blank = commercial ? i = industrial z fpga nomenclature eprom/eeprom nomenclature motorola eprom/eeprom circuit identifier mpa17 xxx yy i number of memory bits (in k) package type ? d = soic ? p = pdip ? fn = plcc temperature grade ? blank = commercial ? i = industrial c
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.150 case outlines 8pin packages p suffix plastic dip package case 62605 issue k notes: 1. dimension l to center of lead when formed parallel. 2. package contour optional (round or square corners). 3. dimensioning and tolerancing per ansi y14.5m, 1982. 14 5 8 f note 2 a b t seating plane h j g d k n c l m m a m 0.13 (0.005) b m t dim min max min max inches millimeters a 9.40 10.16 0.370 0.400 b 6.10 6.60 0.240 0.260 c 3.94 4.45 0.155 0.175 d 0.38 0.51 0.015 0.020 f 1.02 1.78 0.040 0.070 g 2.54 bsc 0.100 bsc h 0.76 1.27 0.030 0.050 j 0.20 0.30 0.008 0.012 k 2.92 3.43 0.115 0.135 l 7.62 bsc 0.300 bsc m 10 10 n 0.76 1.01 0.030 0.040 d suffix plastic soic package case 75105 issue s seating plane 1 4 5 8 a 0.25 m cb ss 0.25 m b m h c x 45 l dim min max millimeters a 1.35 1.75 a1 0.10 0.25 b 0.35 0.49 c 0.18 0.25 d 4.80 5.00 e 1.27 bsc e 3.80 4.00 h 5.80 6.20 h 0 7 l 0.40 1.25 0.25 0.50 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. dimensions are in millimeters. 3. dimension d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include mold protrusion. allowable dambar protrusion shall be 0.127 total in excess of the b dimension at maximum material condition. d e h a b e b a1 c a 0.10
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.151 8pin packages sd suffix plastic ssop package case 94003 issue b dim a min max min max inches 2.87 3.13 0.113 0.123 millimeters b 5.20 5.38 0.205 0.212 c 1.73 1.99 0.068 0.078 d 0.05 0.21 0.002 0.008 f 0.63 0.95 0.024 0.037 g 0.65 bsc 0.026 bsc h 0.44 0.60 0.017 0.023 j 0.09 0.20 0.003 0.008 j1 0.09 0.16 0.003 0.006 k 0.25 0.38 0.010 0.015 k1 0.25 0.33 0.010 0.013 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.15 (0.006) per side. 5. dimension k does not include dambar protrusion/intrusion. allowable dambar protrusion shall be 0.13 (0.005) total in excess of k dimension at maximum material condition. dambar intrusion shall not reduce dimension k by more than 0.07 (0.002) at least material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane w. h a b 85 4 1 f m k 8x ref s u m 0.12 (0.005) v s t l l/2 pin 1 ident s u m 0.20 (0.008) t v u d c 0.076 (0.003) g t seating plane detail e detail e w n n 0.25 (0.010) ???? ???? ???? k j j1 k1 section nn l 7.65 7.90 0.301 0.311 m 0 8 0 8 14pin packages l,j suffix ceramic dip package case 63208 issue y dim min max min max millimeters inches a 0.750 0.785 19.05 19.94 b 0.245 0.280 6.23 7.11 c 0.155 0.200 3.94 5.08 d 0.015 0.020 0.39 0.50 f 0.055 0.065 1.40 1.65 g 0.100 bsc 2.54 bsc j 0.008 0.015 0.21 0.38 k 0.125 0.170 3.18 4.31 l 0.300 bsc 7.62 bsc m 0 15 0 15 n 0.020 0.040 0.51 1.01 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed parallel. 4. dimension f may narrow to 0.76 (0.030) where the lead enters the ceramic body. a b c 14 pl d g fn k 14 pl j m l s b m 0.25 (0.010) t s a m 0.25 (0.010) t t seating plane 17 14 9
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.152 14pin packages p,n suffix plastic dip package case 64606 issue m 17 14 8 b a dim min max min max millimeters inches a 0.715 0.770 18.16 18.80 b 0.240 0.260 6.10 6.60 c 0.145 0.185 3.69 4.69 d 0.015 0.021 0.38 0.53 f 0.040 0.070 1.02 1.78 g 0.100 bsc 2.54 bsc h 0.052 0.095 1.32 2.41 j 0.008 0.015 0.20 0.38 k 0.115 0.135 2.92 3.43 l m 10 10 n 0.015 0.039 0.38 1.01 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. f hg d k c seating plane n t 14 pl m 0.13 (0.005) l m j 0.290 0.310 7.37 7.87 d suffix plastic soic package case 751a03 issue f notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. a b g p 7 pl 14 8 7 1 m 0.25 (0.010) b m s b m 0.25 (0.010) a s t t f r x 45 seating plane d 14 pl k c j m dim min max min max inches millimeters a 8.55 8.75 0.337 0.344 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.228 0.244 r 0.25 0.50 0.010 0.019
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.153 14pin packages m suffix plastic soic eiaj package case 96501 issue o h e a 1 dim min max min max inches 2.05 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 1.42 0.056 a 1 h e q 1 l e 10 0 10 l e q 1 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). 0.13 (0.005) m 0.10 (0.004) d z e 1 14 8 7 e a b view p c l detail p m a b c d e e 0.50 m z sd suffix plastic ssop package case 940a03 issue b dim a min max min max inches 6.07 6.33 0.238 0.249 millimeters b 5.20 5.38 0.205 0.212 c 1.73 1.99 0.068 0.078 d 0.05 0.21 0.002 0.008 f 0.63 0.95 0.024 0.037 g 0.65 bsc 0.026 bsc h 1.08 1.22 0.042 0.048 j 0.09 0.20 0.003 0.008 j1 0.09 0.16 0.003 0.006 k 0.25 0.38 0.010 0.015 k1 0.25 0.33 0.010 0.013 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.15 (0.006) per side. 5. dimension k does not include dambar protrusion/intrusion. allowable dambar protrusion shall be 0.13 (0.005) total in excess of k dimension at maximum material condition. dambar intrusion shall not reduce dimension k by more than 0.07 (0.002) at least material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane w. h a b 14 8 7 1 f m k 14x ref s u m 0.12 (0.005) v s t l l/2 pin 1 ident s u m 0.20 (0.008) t v u d c 0.076 (0.003) g t seating plane detail e detail e w n n 0.25 (0.010) ???? ???? ???? k j j1 k1 section nn l 7.65 7.90 0.301 0.311 m 0 8 0 8
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.154 14pin packages dt suffix plastic tssop package case 948g01 issue o dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c 1.20 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.50 0.60 0.020 0.024 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane w. s u 0.15 (0.006) t 2x l/2 s u m 0.10 (0.004) v s t l u seating plane 0.10 (0.004) t ??? ??? section nn detail e j j1 k k1 detail e f m w 0.25 (0.010) 8 14 7 1 pin 1 ident. h g a d c b s u 0.15 (0.006) t v 14x ref k n n 16pin packages l,j suffix ceramic dip package case 62010 issue v notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed parallel. 4. dimension f may narrow to 0.76 (0.030) where the lead enters the ceramic body. dim min max min max millimeters inches a 0.750 0.785 19.05 19.93 b 0.240 0.295 6.10 7.49 c 0.200 5.08 d 0.015 0.020 0.39 0.50 e 0.050 bsc 1.27 bsc f 0.055 0.065 1.40 1.65 g 0.100 bsc 2.54 bsc h 0.008 0.015 0.21 0.38 k 0.125 0.170 3.18 4.31 l 0.300 bsc 7.62 bsc m 0 15 0 15 n 0.020 0.040 0.51 1.01 a b t f e g n k c seating plane 16 pl d s a m 0.25 (0.010) t 16 pl j s b m 0.25 (0.010) t m l 16 9 18
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.155 16pin packages p,n suffix plastic dip package case 64808 issue r notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. a b f c s h g d j l m 16 pl seating 18 9 16 k plane t m a m 0.25 (0.010) t dim min max min max millimeters inches a 0.740 0.770 18.80 19.55 b 0.250 0.270 6.35 6.85 c 0.145 0.175 3.69 4.44 d 0.015 0.021 0.39 0.53 f 0.040 0.70 1.02 1.77 g 0.100 bsc 2.54 bsc h 0.050 bsc 1.27 bsc j 0.008 0.015 0.21 0.38 k 0.110 0.130 2.80 3.30 l 0.295 0.305 7.50 7.74 m 0 10 0 10 s 0.020 0.040 0.51 1.01 d suffix plastic soic package case 751b05 issue j notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 18 16 9 seating plane f j m r x 45 g 8 pl p b a m 0.25 (0.010) b s t d k c 16 pl s b m 0.25 (0.010) a s t dim min max min max inches millimeters a 9.80 10.00 0.386 0.393 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.229 0.244 r 0.25 0.50 0.010 0.019
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.156 16pin packages dw suffix plastic wide soic package case 751g02 issue a m suffix plastic soic eiaj package case 96601 issue o k c dim min max min max inches millimeters a 10.15 10.45 0.400 0.411 b 7.40 7.60 0.292 0.299 c 2.35 2.65 0.093 0.104 d 0.35 0.49 0.014 0.019 f 0.50 0.90 0.020 0.035 g 1.27 bsc 0.050 bsc j 0.25 0.32 0.010 0.012 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 10.05 10.55 0.395 0.415 r 0.25 0.75 0.010 0.029 m b m 0.010 (0.25) notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimensiom d does not include dambar protrusion. allowable dambar protrusion shall be 0.13 (0.005) total in excess of d dimension at maximum material condition. a b p 8x g 14x d 16x seating plane t s a m 0.010 (0.25) b s t 16 9 8 1 f j r x 45 m h e a 1 dim min max min max inches 2.05 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 0.78 0.031 a 1 h e q 1 l e 10 0 10 l e q 1 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). m l detail p view p c a b e m 0.13 (0.005) 0.10 (0.004) 1 16 9 8 d z e a b c d e e l m z
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.157 16pin packages sd suffix plastic ssop package case 940b03 issue b dt suffix plastic tssop package case 948f01 issue o 16 9 8 1 k 16x ref s u m 0.12 (0.005) v s t a b l l/2 pin 1 ident s u m 0.20 (0.008) t v u h d c 0.076 (0.003) g t seating plane f m detail e detail e w n n 0.25 (0.010) ???? ???? k j j1 k1 section nn dim a min max min max inches 6.07 6.33 0.238 0.249 millimeters b 5.20 5.38 0.205 0.212 c 1.73 1.99 0.068 0.078 d 0.05 0.21 0.002 0.008 f 0.63 0.95 0.024 0.037 g 0.65 bsc 0.026 bsc h 0.73 0.90 0.028 0.035 j 0.09 0.20 0.003 0.008 j1 0.09 0.16 0.003 0.006 k 0.25 0.38 0.010 0.015 k1 0.25 0.33 0.010 0.013 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.15 (0.006) per side. 5. dimension k does not include dambar protrusion/intrusion. allowable dambar protrusion shall be 0.13 (0.005) total in excess of k dimension at maximum material condition. dambar intrusion shall not reduce dimension k by more than 0.07 (0.002) at least material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane w. l 7.65 7.90 0.301 0.311 m 0 8 0 8 ?? ?? ?? dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c 1.20 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.18 0.28 0.007 0.011 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane w. section nn seating plane ident. pin 1 1 8 16 9 detail e j j1 b c d a k k1 h g detail e f m l 2x l/2 u s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) t v w 0.25 (0.010) 16x ref k n n
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.158 18pin packages p,n suffix plastic dip package case 70702 issue c l,j suffix ceramic dip package case 72604 issue g notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed parallel. 4. dimension f for full leads. half leads optional at lead positions 1, 9, 10, and 18. 1 seating plane 10 9 18 m k c n f g d l a b 18 pl j 18 pl t s a m 0.25 (0.010) t s b m 0.25 (0.010) t optional lead configuration (1, 9, 10, 18) dim min max min max millimeters inches a 22.35 23.11 0.880 0.910 b 6.10 7.49 0.240 0.295 c 5.08 0.200 d 0.38 0.53 0.015 0.021 g 2.54 bsc 0.100 bsc j 0.20 0.30 0.008 0.012 k 3.18 4.32 0.125 0.170 l 7.62 bsc 0.300 bsc m 0 15 0 15 n 0.51 1.02 0.020 0.040 f 1.40 1.78 0.055 0.070 notes: 1. positional tolerance of leads (d), shall be within 0.25 (0.010) at maximum material condition, in relation to seating plane and each other. 2. dimension l to center of leads when formed parallel. 3. dimension b does not include mold flash. 1 seating plane 10 9 18 m a b k c n f g d h j l dim min max min max inches millimeters a 22.22 23.24 0.875 0.915 b 6.10 6.60 0.240 0.260 c 3.56 4.57 0.140 0.180 d 0.36 0.56 0.014 0.022 f 1.27 1.78 0.050 0.070 g 2.54 bsc 0.100 bsc h 1.02 1.52 0.040 0.060 j 0.20 0.30 0.008 0.012 k 2.92 3.43 0.115 0.135 l 7.62 bsc 0.300 bsc m 0 15 0 15 n 0.51 1.02 0.020 0.040
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.159 20pin packages l,j suffix ceramic dip package case 73203 issue e p,n suffix plasticc dip package case 73803 issue e dw suffix plastic wide soic package case 751d04 issue e notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.150 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.13 (0.005) total in excess of d dimension at maximum material condition. a b 20 1 11 10 s a m 0.010 (0.25) b s t d 20x m b m 0.010 (0.25) p 10x j f g 18x k c t seating plane m r x 45 dim min max min max inches millimeters a 12.65 12.95 0.499 0.510 b 7.40 7.60 0.292 0.299 c 2.35 2.65 0.093 0.104 d 0.35 0.49 0.014 0.019 f 0.50 0.90 0.020 0.035 g 1.27 bsc 0.050 bsc j 0.25 0.32 0.010 0.012 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 10.05 10.55 0.395 0.415 r 0.25 0.75 0.010 0.029 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed parallel. 4. dimension b does not include mold flash. m j 20 pl m b m 0.25 (0.010) t dim min max min max millimeters inches a 25.66 27.17 1.010 1.070 b 6.10 6.60 0.240 0.260 c 3.81 4.57 0.150 0.180 d 0.39 0.55 0.015 0.022 g 2.54 bsc 0.100 bsc j 0.21 0.38 0.008 0.015 k 2.80 3.55 0.110 0.140 l 7.62 bsc 0.300 bsc m 0 15 0 15 n 0.51 1.01 0.020 0.040 e 1.27 1.77 0.050 0.070 1 11 10 20 a seating plane k n f g d 20 pl t m a m 0.25 (0.010) t e b c f 1.27 bsc 0.050 bsc notes: 1. leads within 0.25 (0.010) diameter, true position at seating plane, at maximum material condition. 2. dimension l to center of leads when formed parallel. 3. dimensions a and b include meniscus. dim min max min max inches millimeters a 23.88 25.15 0.940 0.990 b 6.60 7.49 0.260 0.295 c 3.81 5.08 0.150 0.200 d 0.38 0.56 0.015 0.022 f 1.40 1.65 0.055 0.065 g 2.54 bsc 0.100 bsc h 0.51 1.27 0.020 0.050 j 0.20 0.30 0.008 0.012 k 3.18 4.06 0.125 0.160 l 7.62 bsc 0.300 bsc m 0 15 0 15 n 0.25 1.02 0.010 0.040 a 20 110 11 b f c seating plane d h g k n j m l
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.160 20pin packages m suffix plastic soic eiaj package case 96701 issue o sd suffix plastic ssop package case 940c03 issue b 20 11 10 1 h a b f m k 20x ref s u m 0.12 (0.005) v s t l l/2 pin 1 ident s u m 0.20 (0.008) t v u d c 0.076 (0.003) g t seating plane detail e n n 0.25 (0.010) ???? ???? ???? k j j1 k1 section nn dim a min max min max inches 7.07 7.33 0.278 0.288 millimeters b 5.20 5.38 0.205 0.212 c 1.73 1.99 0.068 0.078 d 0.05 0.21 0.002 0.008 f 0.63 0.95 0.024 0.037 g 0.65 bsc 0.026 bsc h 0.59 0.75 0.023 0.030 j 0.09 0.20 0.003 0.008 j1 0.09 0.16 0.003 0.006 k 0.25 0.38 0.010 0.015 k1 0.25 0.33 0.010 0.013 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.15 (0.006) per side. 5. dimension k does not include dambar protrusion/intrusion. allowable dambar protrusion shall be 0.13 (0.005) total in excess of k dimension at maximum material condition. dambar intrusion shall not reduce dimension k by more than 0.07 (0.002) at least material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane w. l 7.65 7.90 0.301 0.311 m 0 8 0 8 detail e w dim min max min max inches 2.05 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 12.35 12.80 0.486 0.504 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 0.81 0.032 a 1 h e q 1 l e 10 0 10 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). h e a 1 l e q 1 c a z d e 20 110 11 b m 0.13 (0.005) e 0.10 (0.004) view p detail p m l a b c d e e l m z
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.161 20pin packages dt suffix plastic tssop package case 948e02 issue a dim a min max min max inches 6.60 0.260 millimeters b 4.30 4.50 0.169 0.177 c 1.20 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.27 0.37 0.011 0.015 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane w. 110 11 20 pin 1 ident a b t 0.100 (0.004) c d g h section nn k k1 jj1 n n m f w seating plane v u s u m 0.10 (0.004) v s t 20x ref k l l/2 2x s u 0.15 (0.006) t detail e 0.25 (0.010) detail e 6.40 0.252 s u 0.15 (0.006) t
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.162 20pin packages fn suffix plastic plcc package case 77502 issue c notes: 1. datums l, m, and n determined where top of lead shoulder exits plastic body at mold parting line. 2. dimension g1, true position to be measured at datum t, seating plane. 3. dimensions r and u do not include mold flash. allowable mold flash is 0.010 (0.250) per side. 4. dimensioning and tolerancing per ansi y14.5m, 1982. 5. controlling dimension: inch. 6. the package top may be smaller than the package bottom by up to 0.012 (0.300). dimensions r and u are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs and interlead flash, but including any mismatch between the top and bottom of the plastic body. 7. dimension h does not include dambar protrusion or intrusion. the dambar protrusion(s) shall not cause the h dimension to be greater than 0.037 (0.940). the dambar intrusion(s) shall not cause the h dimension to be smaller than 0.025 (0.635). m n l y brk w v d d s lm m 0.007 (0.180) n s t s lm m 0.007 (0.180) n s t s lm s 0.010 (0.250) n s t x g1 b u z view dd 20 1 s lm m 0.007 (0.180) n s t s lm m 0.007 (0.180) n s t s lm s 0.010 (0.250) n s t c g view s e j r z a 0.004 (0.100) t seating plane s lm m 0.007 (0.180) n s t s lm m 0.007 (0.180) n s t h view s k k1 f g1 dim min max min max millimeters inches a 0.385 0.395 9.78 10.03 b 0.385 0.395 9.78 10.03 c 0.165 0.180 4.20 4.57 e 0.090 0.110 2.29 2.79 f 0.013 0.019 0.33 0.48 g 0.050 bsc 1.27 bsc h 0.026 0.032 0.66 0.81 j 0.020 0.51 k 0.025 0.64 r 0.350 0.356 8.89 9.04 u 0.350 0.356 8.89 9.04 v 0.042 0.048 1.07 1.21 w 0.042 0.048 1.07 1.21 x 0.042 0.056 1.07 1.42 y 0.020 0.50 z 2 10 2 10 g1 0.310 0.330 7.88 8.38 k1 0.040 1.02
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.163 24pin packages notes: 1. dimension l to center of leads when formed parallel. 2. leads within 0.13 (0.005) radius of true position at seating plane at maximum material condition (when formed parallel). 112 24 13 b a seating plane f d g k n c m j l dim min max min max inches millimeters a 31.24 32.77 1.230 1.290 b 12.70 15.49 0.500 0.610 c 4.06 5.59 0.160 0.220 d 0.41 0.51 0.016 0.020 f 1.27 1.52 0.050 0.060 g 2.54 bsc 0.100 bsc j 0.20 0.30 0.008 0.012 k 3.18 4.06 0.125 0.160 l 15.24 bsc 0.600 bsc m 0 15 0 15 n 0.51 1.27 0.020 0.050 c n k f g b 1 24 12 13 l p j seating plane dim a min max min max millimeters 1.240 1.285 31.50 32.64 inches b 0.285 0.305 7.24 7.75 c 0.160 0.200 4.07 5.08 d 0.015 0.021 0.38 0.53 f 0.045 0.062 1.14 1.57 g 0.100 bsc 2.54 bsc j 0.008 0.013 0.20 0.33 k 0.100 0.165 2.54 4.19 l 0.300 0.310 7.62 7.87 n 0.020 0.050 0.51 1.27 p 0.360 0.400 9.14 10.16 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 0.25 (0.010) m ta m d 24 pl t a j suffix ceramic dip package case 75802 issue a l,j,jw suffix ceramic dip package case 62305 issue m
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.164 24pin packages notes: 1. leads within 0.13 (0.005) radius of true position at seating plane at maximum material condition. 2. dimension l to center of leads when formed parallel. dim min max min max inches millimeters a 31.50 32.13 1.240 1.265 b 13.21 13.72 0.520 0.540 c 4.70 5.21 0.185 0.205 d 0.38 0.51 0.015 0.020 f 1.02 1.52 0.040 0.060 g 2.54 bsc 0.100 bsc h 1.65 2.16 0.065 0.085 j 0.20 0.30 0.008 0.012 k 2.92 3.43 0.115 0.135 l 14.99 15.49 0.590 0.610 m 10 10 n 0.51 1.02 0.020 0.040 p 0.13 0.38 0.005 0.015 q 0.51 0.76 0.020 0.030 n suffix plastic dip package case 70902 issue c p,n suffix plastic dip package case 72403 issue d p,n,pw suffix plastic dip package case 64903 issue d notes: 1. positional tolerance of leads (d), shall be within 0.25 (0.010) at maximum material condition, in relation to seating plane and each other. 2. dimension l to center of leads when formed parallel. 3. dimension b does not include mold flash. dim min max min max inches millimeters a 31.37 32.13 1.235 1.265 b 13.72 14.22 0.540 0.560 c 3.94 5.08 0.155 0.200 d 0.36 0.56 0.014 0.022 f 1.02 1.52 0.040 0.060 g 2.54 bsc 0.100 bsc h 1.65 2.03 0.065 0.080 j 0.20 0.38 0.008 0.015 k 2.92 3.43 0.115 0.135 l 15.24 bsc 0.600 bsc m 0 15 0 15 n 0.51 1.02 0.020 0.040 112 13 24 b h a f d g k seating plane n c m j l notes: 1. chamfered contour optional. 2. dimension l to center of leads when formed parallel. 3. dimensioning and tolerancing per ansi y14.5m, 1982. 4. controlling dimension: inch. a b 24 13 12 1 t seating plane 24 pl k e f n c d g m a m 0.25 (0.010) t 24 pl j m b m 0.25 (0.010) t l m note 1 dim min max min max millimeters inches a 1.230 1.265 31.25 32.13 b 0.250 0.270 6.35 6.85 c 0.145 0.175 3.69 4.44 d 0.015 0.020 0.38 0.51 e 0.050 bsc 1.27 bsc f 0.040 0.060 1.02 1.52 g 0.100 bsc 2.54 bsc j 0.007 0.012 0.18 0.30 k 0.110 0.140 2.80 3.55 l 0.300 bsc 7.62 bsc m 0 15 0 15 n 0.020 0.040 0.51 1.01 seating plane 1 12 24 13 j g f c k b h n q p a d m l
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.165 24pin packages notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.13 (0.005) total in excess of d dimension at maximum material condition. dim min max min max inches millimeters a 15.25 15.54 0.601 0.612 b 7.40 7.60 0.292 0.299 c 2.35 2.65 0.093 0.104 d 0.35 0.49 0.014 0.019 f 0.41 0.90 0.016 0.035 g 1.27 bsc 0.050 bsc j 0.23 0.32 0.009 0.013 k 0.13 0.29 0.005 0.011 m 0 8 0 8 p 10.05 10.55 0.395 0.415 r 0.25 0.75 0.010 0.029 dw suffix plastic wide soic package case 751e04 issue e sd suffix plastic ssop package case 940d03 issue b a b p 12x d 24x 12 13 24 1 m 0.010 (0.25) b m s a m 0.010 (0.25) b s t t g 22x seating plane k c r x 45 m f j 24 13 12 1 dim a min max min max inches 8.07 8.33 0.317 0.328 millimeters b 5.20 5.38 0.205 0.212 c 1.73 1.99 0.068 0.078 d 0.05 0.21 0.002 0.008 f 0.63 0.95 0.024 0.037 g 0.65 bsc 0.026 bsc h 0.44 0.60 0.017 0.024 j 0.09 0.20 0.003 0.008 j1 0.09 0.16 0.003 0.006 k 0.25 0.38 0.010 0.015 k1 0.25 0.33 0.010 0.013 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.15 (0.006) per side. 5. dimension k does not include dambar protrusion/intrusion. allowable dambar protrusion shall be 0.13 (0.005) total in excess of k dimension at maximum material condition. dambar intrusion shall not reduce dimension k by more than 0.07 (0.002) at least material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane w. l 7.65 7.90 0.301 0.311 m 0 8 0 8 f m detail e n n 0.25 (0.010) ???? ???? k j j1 k1 section nn a b k 24x ref s u m 0.12 (0.005) v s t l l/2 pin 1 ident s u m 0.20 (0.008) t v u h d c 0.076 (0.003) g t seating plane detail e w
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.166 24pin packages dt suffix plastic tssop package case 948h01 issue o dim min max min max inches millimeters a 7.70 7.90 0.303 0.311 b 4.30 4.50 0.169 0.177 c 1.20 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.27 0.37 0.011 0.015 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane w. s u 0.15 (0.006) t 2x l/2 s u m 0.10 (0.004) v s t l u seating plane 0.10 (0.004) t ??? ??? ??? section nn detail e j j1 k k1 detail e f m w 0.25 (0.010) 13 24 12 1 pin 1 ident. h g a d c b s u 0.15 (0.006) t v 24x ref k n n
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.167 28pin packages fn suffix plastic plcc package case 77602 issue d notes: 1. datums l, m, and n determined where top of lead shoulder exits plastic body at mold parting line. 2. dimension g1, true position to be measured at datum t, seating plane. 3. dimensions r and u do not include mold flash. allowable mold flash is 0.010 (0.250) per side. 4. dimensioning and tolerancing per ansi y14.5m, 1982. 5. controlling dimension: inch. 6. the package top may be smaller than the package bottom by up to 0.012 (0.300). dimensions r and u are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs and interlead flash, but including any mismatch between the top and bottom of the plastic body. 7. dimension h does not include dambar protrusion or intrusion. the dambar protrusion(s) shall not cause the h dimension to be greater than 0.037 (0.940). the dambar intrusion(s) shall not cause the h dimension to be smaller than 0.025 (0.635). n m l v w d d y brk 28 1 view s s lm s 0.010 (0.250) n s t s lm m 0.007 (0.180) n s t 0.004 (0.100) g1 g j c z r e a seating plane s lm m 0.007 (0.180) n s t t b s lm s 0.010 (0.250) n s t s lm m 0.007 (0.180) n s t u s lm m 0.007 (0.180) n s t z g1 x view dd s lm m 0.007 (0.180) n s t k1 view s h k f s lm m 0.007 (0.180) n s t dim min max min max millimeters inches a 0.485 0.495 12.32 12.57 b 0.485 0.495 12.32 12.57 c 0.165 0.180 4.20 4.57 e 0.090 0.110 2.29 2.79 f 0.013 0.019 0.33 0.48 g 0.050 bsc 1.27 bsc h 0.026 0.032 0.66 0.81 j 0.020 0.51 k 0.025 0.64 r 0.450 0.456 11.43 11.58 u 0.450 0.456 11.43 11.58 v 0.042 0.048 1.07 1.21 w 0.042 0.048 1.07 1.21 x 0.042 0.056 1.07 1.42 y 0.020 0.50 z 2 10 2 10 g1 0.410 0.430 10.42 10.92 k1 0.040 1.02
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.168 32pin package fa suffix plastic tqfp package case 873a02 issue a detail y a s1 v b 1 8 9 17 25 32 ae ae p detail y base n j d f metal section aeae g seating plane r q w k x 0.250 (0.010) gauge plane e c h detail ad notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. datum plane ab is located at bottom of lead and is coincident with the lead where the lead exits the plastic body at the bottom of the parting line. 4. datums t, u, and z to be determined at datum plane ab. 5. dimensions s and v to be determined at seating plane ac. 6. dimensions a and b do not include mold protrusion. allowable protrusion is 0.250 (0.010) per side. dimensions a and b do include mold mismatch and are determined at datum plane ab. 7. dimension d does not include dambar protrusion. dambar protrusion shall not cause the d dimension to exceed 0.520 (0.020). 8. minimum solder plate thickness shall be 0.0076 (0.0003). 9. exact shape of each corner may vary from depiction. dim a min max min max inches 7.000 bsc 0.276 bsc millimeters b 7.000 bsc 0.276 bsc c 1.400 1.600 0.055 0.063 d 0.300 0.450 0.012 0.018 e 1.350 1.450 0.053 0.057 f 0.300 0.400 0.012 0.016 g 0.800 bsc 0.031 bsc h 0.050 0.150 0.002 0.006 j 0.090 0.200 0.004 0.008 k 0.500 0.700 0.020 0.028 m 12 ref 12 ref n 0.090 0.160 0.004 0.006 p 0.400 bsc 0.016 bsc q 1 5 1 5 r 0.150 0.250 0.006 0.010 v 9.000 bsc 0.354 bsc v1 4.500 bsc 0.177 bsc detail ad a1 b1 v1 4x s 4x b1 3.500 bsc 0.138 bsc a1 3.500 bsc 0.138 bsc s 9.000 bsc 0.354 bsc s1 4.500 bsc 0.177 bsc w 0.200 ref 0.008 ref x 1.000 ref 0.039 ref 9 t z u tu 0.20 (0.008) z ac tu 0.20 (0.008) z ab 0.10 (0.004) ac ac ab m 8x t, u, z tu m 0.20 (0.008) z ac
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.169 40pin packages n suffix plastic dip package case 71103 issue c notes: 1. positional tolerance of leads (d), shall be within 0.25 (0.010) at maximum material condition, in relation to seating plane and each other. 2. dimension l to center of leads when formed parallel. 3. dimension b does not include mold flash. 1 20 40 21 b a c seating plane d f g h k n m j l dim min max min max inches millimeters a 51.69 52.45 2.035 2.065 b 13.72 14.22 0.540 0.560 c 3.94 5.08 0.155 0.200 d 0.36 0.56 0.014 0.022 f 1.02 1.52 0.040 0.060 g 2.54 bsc 0.100 bsc h 1.65 2.16 0.065 0.085 j 0.20 0.38 0.008 0.015 k 2.92 3.43 0.115 0.135 l 15.24 bsc 0.600 bsc m 0 15 0 15 n 0.51 1.02 0.020 0.040 48pin packages j suffix ceramic dip package case 74003 issue b dim a min max min max millimeters 2.376 2.424 60.36 61.56 inches b 0.576 0.604 14.64 15.34 c 0.120 0.127 3.05 4.31 d 0.015 0.021 0.381 0.533 e 0.050 bsc 1.27 bsc f 0.030 0.055 0.762 1.397 g 0.100 bsc 2.54 bsc j 0.008 0.013 0.204 0.330 k 0.100 0.165 2.54 4.19 l 0.600 bsc 15.24 bsc m n 0.040 0.060 1.016 1.524 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed parallel. c 10 10 0 0 48 25 1 24 d 48 pl k n e g f seating plane 0.25 (0.010) t b m m 0.25 (0.010) t a m m j 48 pl l m a b t
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.170 48pin packages n suffix plastic dip package case 76702 issue b a b 48 25 1 24 t seating plane f g detail x 32 pl d 48 pl j s b m 0.25 (0.010) t s a m 0.51 (0.020) t n c k 48 pl m detail x l tip taper notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed parallel. 4. dimensions a and b do not include mold flash. maximum mold flash 0.25 (0.010). dim min max min max millimeters inches a 2.415 2.445 61.34 62.10 b 0.540 0.560 13.72 14.22 c 0.155 0.200 3.94 5.08 d 0.014 0.022 0.36 0.55 f 0.040 0.060 1.02 1.52 g 0.100 bsc 2.54 bsc h 0.070 bsc 1.79 bsc j 0.008 0.015 0.20 0.38 k 0.115 0.150 2.92 3.81 l 0.600 bsc 15.24 bsc m 0 15 0 15 n 0.020 0.040 0.51 1.01 dt suffix plastic tssop package case 120101 issue a ??? ??? s u m 0.12 (0.005) v s t s u m 0.254 (0.010) t v b a l k u 48x ref pin 1 ident. 124 25 48 0.076 (0.003) seating d t plane dim min max min max inches millimeters a 12.40 12.60 0.488 0.496 b 6.00 6.20 0.236 0.244 c 1.10 0.043 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.50 bsc 0.0197 bsc h 0.37 0.015 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.17 0.27 0.007 0.011 k1 0.17 0.23 0.007 0.009 l 7.95 8.25 0.313 0.325 m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 5. terminal numbers are shown for reference only. 6. dimensions a and b are to be determined at datum plane w. c g h w detail e j k1 k j1 section nn m 0.25 (0.010) f detail e n n
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.171 52pin packages fn suffix plastic plcc package case 77802 issue c l y brk w d d v 52 1 notes: 1. datums l, m, and n determined where top of lead shoulder exits plastic body at mold parting line. 2. dimension g1, true position to be measured at datum t, seating plane. 3. dimensions r and u do not include mold flash. allowable mold flash is 0.010 (0.250) per side. 4. dimensioning and tolerancing per ansi y14.5m, 1982. 5. controlling dimension: inch. 6. the package top may be smaller than the package bottom by up to 0.012 (0.300). dimensions r and u are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs and interlead flash, but including any mismatch between the top and bottom of the plastic body. 7. dimension h does not include dambar protrusion or intrusion. the dambar protrusion(s) shall not cause the h dimension to be greater than 0.037 (0.940). the dambar intrusion(s) shall not cause the h dimension to be smaller than 0.025 (0.635). b u z g1 x view dd h k1 k f view s m 0.007 (0.18) lm s t s n m 0.007 (0.18) lm s t s n 0.004 (0.100) t seating plane m 0.007 (0.18) lm s t s n m 0.007 (0.18) lm s t s n a r g g1 c z j e view s m n dim min max min max millimeters inches a 0.785 0.795 19.94 20.19 b 0.785 0.795 19.94 20.19 c 0.165 0.180 4.20 4.57 e 0.090 0.110 2.29 2.79 f 0.013 0.019 0.33 0.48 g 0.050 bsc 1.27 bsc h 0.026 0.032 0.66 0.81 j 0.020 0.51 k 0.025 0.64 r 0.750 0.756 19.05 19.20 u 0.750 0.756 19.05 19.20 v 0.042 0.048 1.07 1.21 w 0.042 0.048 1.07 1.21 x 0.042 0.056 1.07 1.42 y 0.020 0.50 z 2 10 2 10 g1 0.710 0.730 18.04 18.54 k1 0.040 1.02 m 0.007 (0.18) lm s t s n m 0.007 (0.18) lm s t s n s 0.010 (0.25) lm s t s n s 0.010 (0.25) lm s t s n
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.172 52pin packages fa suffix plastic tqfp package case 848d03 issue d f notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. datum plane h is located at bottom of lead and is coincident with the lead where the lead exits the plastic body at the bottom of the parting line. 4. datums l, m and n to be determined at datum plane h. 5. dimensions s and v to be determined at seating plane t. 6. dimensions a and b do not include mold protrusion. allowable protrusion is 0.25 (0.010) per side. dimensions a and b do include mold mismatch and are determined at datum plane -h-. 7. dimension d does not include dambar protrusion. dambar protrusion shall not cause the lead width to exceed 0.46 (0.018). minimum space between protrusion and adjacent lead or protrusion 0.07 (0.003). ???? ???? view aa ab ab view y section abab rotated 90 clockwise dim a min max min max inches 10.00 bsc 0.394 bsc millimeters a1 5.00 bsc 0.197 bsc b 10.00 bsc 0.394 bsc b1 5.00 bsc 0.197 bsc c 1.70 0.067 c1 0.05 0.20 0.002 0.008 c2 1.30 1.50 0.051 0.059 d 0.20 0.40 0.008 0.016 e 0.45 0.030 f 0.22 0.35 0.009 0.014 g 0.65 bsc 0.75 0.018 0.026 bsc j 0.07 0.20 0.003 0.008 k 0.50 ref 0.020 ref r1 0.08 0.20 0.003 0.008 s 12.00 bsc 0.472 bsc s1 6.00 bsc 0.236 bsc u 0.09 0.16 0.004 0.006 v 12.00 bsc 0.472 bsc v1 6.00 bsc 0.236 bsc w 0.20 ref 0.008 ref z 1.00 ref 0.039 ref c l x x=l, m, n 1 13 14 26 27 39 40 52 4x 13 tips 4x n 0.20 (0.008) h lm n 0.20 (0.008) t lm seating plane c 0.10 (0.004) t 4x 3 4x 2 s 0.05 (0.002) 0.25 (0.010) gage plane c2 c1 w k e z s lm m 0.13 (0.005) n s t plating base metal d j u b v b1 a s v1 a1 s1 l n m h t 1 g q 1 q q 3 q 2 07 12 07 0 0 ref 12 ref 3x view y view aa 2x r r1 12 ref 12 ref
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.173 56pin packages dt suffix plastic tssop package case 120201 issue a s u m 0.12 (0.005) v s t s u m 0.254 (0.010) t v b a l k u 56x ref pin 1 ident. 128 29 56 dim min max min max inches millimeters a 13.90 14.10 0.547 0.555 b 6.00 6.20 0.236 0.244 c 1.10 0.043 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.50 bsc 0.0197 bsc h 0.12 0.005 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.17 0.27 0.007 0.011 k1 0.17 0.23 0.007 0.009 l 7.95 8.25 0.313 0.325 m 0 8 0 8 ???? ???? w detail e j k1 k j1 section nn notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 5. terminal numbers are shown for reference only. 6. dimensions a and b are to be determined at datum plane w. 0.076 (0.003) seating d t plane c g h m 0.25 (0.010) f detail e n n
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.174 68pin package fn suffix plastic plcc package case 77902 issue c notes: 1. datums l, m, and n determined where top of lead shoulder exits plastic body at mold parting line. 2. dimension g1, true position to be measured at datum t, seating plane. 3. dimensions r and u do not include mold flash. allowable mold flash is 0.010 (0.250) per side. 4. dimensioning and tolerancing per ansi y14.5m, 1982. 5. controlling dimension: inch. 6. the package top may be smaller than the package bottom by up to 0.012 (0.300). dimensions r and u are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs and interlead flash, but including any mismatch between the top and bottom of the plastic body. 7. dimension h does not include dambar protrusion or intrusion. the dambar protrusion(s) shall not cause the h dimension to be greater than 0.037 (0.940). the dambar intrusion(s) shall not cause the h dimension to be smaller than 0.025 (0.635). n l m brk y w v d d 68 1 a r g g1 e j view s c z s lm s 0.010 (0.25) n s t s lm m 0.007 (0.18) n s t s lm m 0.007 (0.18) n s t 0.004 (0.10) t seating plane s lm m 0.007 (0.18) n s t s lm m 0.007 (0.18) n s t s lm s 0.010 (0.25) n s t s lm m 0.007 (0.18) n s t s lm m 0.007 (0.18) n s t x z g1 view dd u b dim min max min max millimeters inches a 0.985 0.995 25.02 25.27 b 0.985 0.995 25.02 25.27 c 0.165 0.180 4.20 4.57 e 0.090 0.110 2.29 2.79 f 0.013 0.019 0.33 0.48 g 0.050 bsc 1.27 bsc h 0.026 0.032 0.66 0.81 j 0.020 0.51 k 0.025 0.64 r 0.950 0.956 24.13 24.28 u 0.950 0.956 24.13 24.28 v 0.042 0.048 1.07 1.21 w 0.042 0.048 1.07 1.21 x 0.042 0.056 1.07 1.42 y 0.020 0.50 z 2 10 2 10 g1 0.910 0.930 23.12 23.62 k1 0.040 1.02 k1 k f h view s
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.175 programmable array 84pin package fn suffix plastic plcc package case 780a01 issue a notes: 1. datums l, m, n, and p determined where top of lead shoulder exits package body at glass parting line. 2. dimension g1, true position to be measured at datum t, seating plane. 3. dimensions r and u do not include glass protrusion. allowable glass protrusion is 0.25 (0.010) per side. 4. dimensioning and tolerancing per ansi y14.5m, 1982. 5. controlling dimension: inch. l m p n y brk w d d v 84 1 s l m 0.18 (0.007) m s t s np s s l m 0.18 (0.007) m s t s np s a r g g1 s l s 0.25 (0.010) m s t s np s c z j e detail s 0.100 (0.004) t seating plane s n m 0.25 (0.010) p s t s lm s s l m 0.18 (0.007) m s t s np s s np s m 0.18 (0.007) t s lm s s np s m 0.18 (0.007) t s lm s b u z1 g1 x detail dd s np s m 0.18 (0.007) t s lm s h k1 k f detail s s l m 0.18 (0.007) m s t s np s s np s m 0.18 (0.007) t s lm s dim min max min max millimeters inches a 1.185 1.195 30.10 30.35 b 1.185 1.195 30.10 30.35 c 0.165 0.180 4.20 4.57 e 0.090 0.110 2.29 2.79 f 0.013 0.021 0.33 0.53 g 0.050 bsc 1.27 bsc h 0.026 0.032 0.66 0.81 j 0.020 0.51 k 0.025 0.64 r 1.150 1.156 29.21 29.36 u 1.150 1.156 29.21 29.36 v 0.042 0.048 1.07 1.21 w 0.042 0.048 1.07 1.21 x 0.042 0.056 1.07 1.42 y 0.020 0.50 z 2 10 2 10 g1 1.110 1.130 28.20 28.70 k1 0.040 1.02 z1 2 10 2 10
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.176 programmable array 128pin package dd suffix plastic qfp package case 862a02 issue b dim min max min max inches millimeters a 27.90 28.10 1.098 1.106 b 27.90 28.10 1.098 1.106 c 4.07 0.160 d 0.30 0.45 0.012 0.018 e 3.17 3.67 0.125 0.144 f 0.30 0.40 0.012 0.016 g 0.80 bsc 0.032 bsc h 0.25 0.35 0.010 0.014 j 0.13 0.23 0.005 0.009 k 0.65 0.95 0.026 0.037 l 24.80 ref 0.976 ref m 5 16 5 16 n 0.13 0.17 0.005 0.007 p 0.40 bsc 0.016 bsc q 0 7 0 7 r 0.13 0.30 0.005 0.012 s 30.95 31.45 1.219 1.238 t 0.13 0.005 u 0 0 v 30.95 31.45 1.219 1.238 w 0.40 0.016 x 1.60 ref 0.063 ref y 1.60 ref 0.063 ref z 1.60 ref 0.063 ref notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter 3. datum plane h is located at bottom of lead and is coincident with the lead where the lead exits the plastic body at the bottom of the parting line. 4. datums a, b and dto be determined at datum plane h. 5. dimensions s and v to be determined at seating plane c. 6. dimensions a and b do not include mold protrusion. allowable protrusion is 0.25 (0.010) per side. dimensions a and b do include mold mismatch and are determined at datum plane h. 7. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the d dimension at maximum material condition. dambar cannot be located on the lower radius of the foot. b s ab m 0.20 (0.008) d s c n f d j detail b a, b, d p detail a h k x detail c w t r u q datum plane a l y lb s a m 96 97 64 65 128 132 33 0.05 (0.002) ab 0.10 (0.004) 0.05 (0.002) d d z v detail a seating datum plane plane e c h g detail c c detail b h m base metal s ab m 0.20 (0.008) d s c s ab m 0.20 (0.008) d s c s ab m 0.20 (0.008) d s h s ab m 0.20 (0.008) d s h
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.177 programmable array 160pin package dh suffix plastic qfp package case 864a03 issue c ???? ???? ???? detail c h b a d l y detail a b v l z a s s ab m 0.20 (0.008) d s h ab 0.20 (0.008) s ab m 0.20 (0.008) d s c s ab m 0.20 (0.008) d s h s ab m 0.20 (0.008) d s c detail a g p a, b, d b b h c e c m u w k x q r t h seating plane 0.10 (0.004) s ab m 0.13 (0.005) d s c d n f j base metal section bb detail c notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. datum plane h is located at bottom of lead and is coincident with the lead where the lead exits the plastic body at the bottom of the parting line. 4. datums a, b and d to be determined at datum plane h. 5. dimensions s and v to be determined at seating plane c. 6. dimensions a and b do not include mold protrusion. allowable protrusion is 0.25 (0.010) per side. dimensions a and b do include mold mismatch and are determined at datum plane h. 7. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the d dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. dim min max min max inches millimeters a 27.90 28.10 1.098 1.106 b 27.90 28.10 1.098 1.106 c 3.35 3.85 0.132 0.152 d 0.22 0.38 0.009 0.015 e 3.20 3.50 0.126 0.138 f 0.22 0.33 0.009 0.013 g 0.65 bsc 0.026 ref h 0.25 0.35 0.010 0.014 j 0.11 0.23 0.004 0.009 k 0.70 0.90 0.028 0.035 l 25.35 ref 0.998 ref m 5 16 5 16 n 0.11 0.19 0.004 0.007 p 0.325 bsc 0.013 bsc q 0 7 0 7 r 0.13 0.30 0.005 0.012 s 31.00 31.40 1.220 1.236 t 0.13 0.005 u 0 0 v 31.00 31.40 1.220 1.236 w 0.40 0.016 x 1.60 ref 0.063 ref y 1.33 ref 0.052 ref z 1.33 ref 0.052 ref ab 0.20 (0.008) top & bottom 1 160 40 41 80 81 120 121
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.178 programmable array 181pin package hi suffix ceramic pga package case 768n01 issue o pin 1 indentification a b m c k f n l seating plane b 0.030 (0.76) m ta ss 0.015 (0.38) m t a b c d e f g h j k l m n p r notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. dim a min max min max millimeters 1.555 1.595 39.50 40.51 inches b 1.555 1.595 39.50 40.51 c 0.102 0.124 2.59 3.15 d 0.016 0.020 0.41 0.51 f 0.040 0.060 1.02 1.52 g 0.100 bsc 2.54 bsc k 0.110 0.150 2.79 3.81 l 0.043 0.057 1.09 1.45 m 0.655 0.675 16.64 17.15 n 0.090 0.110 2.29 2.79 g g 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 181 pl d t
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.179 programmable array 208pin package dk suffix plastic qfp package case 872a01 issue o ????? ????? ????? dim a min max min max inches 27.90 28.10 1.098 1.106 millimeters b 27.90 28.10 1.098 1.106 c 3.45 4.10 0.136 0.161 d 0.14 0.30 0.005 0.012 e 3.20 3.60 1.126 0.142 f 0.14 0.26 0.005 0.010 g 0.50 bsc 0.020 bsc h 0.25 0.35 0.010 0.014 j 0.09 0.20 0.003 0.008 k 0.70 0.90 0.027 0.036 l 25.50 ref 1.004 ref m 5 n 0.09 0.18 0.003 0.007 p 0.25 bsc 0.010 bsc q r 0.13 0.30 0.005 0.012 s 31.00 31.40 1.220 1.236 t 0.13 0.005 u v 31.00 31.40 1.220 1.236 w 0.40 0.016 x 1.60 ref 0.063 ref y 1.25 ref 0.049 ref z 1.25 ref 0.049 ref notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. datum plane h is located at bottom of lead and is coincident with the lead where the lead exits the plastic body at the bottom of the parting line. 4. datums a, b and d to be determined at datum plane h. 5. dimensions s and v to be determined at seating plane c. 6. dimensions a and b do not include mold protrusion. allowable protrusion is 0.25 (0.010) per side. dimensions a and b do include mold mismatch and are determined at datum plane h. 7. dimension d does not include dambar protrusion. dambar protrusion shall not cause the d dimension to exceed 0.38 (0.015). 9 5 9 0 7 0 7 0 0 0.05 (0.002) ab d 0.20 (0.008) m c ab ss b v detail a 152 53 104 105 156 157 208 z a s ab 0.20 (0.008) m hd s s 0.05 (0.002) ab d 0.20 (0.008) m c ab s s m m 0.10 (0.004) detail c datum plane d 0.06 (0.002) m c ab ss p u q t r w k x b b n f d j base metal l y section bb detail a detail c a b d l a, b, d rotated 7 ccw h c seating plane c h e g detail b detail b h datum plane d 0.20 (0.008) m h ab ss
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.180 programmable array 224pin package ke suffix pin grid array package case 860f01 issue o notes: 1. dimensions are in inches. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. minimum spacing between conductors shall be 0.020. dim min max inches a 0.070 0.145 d 1.740 1.780 e 1.740 1.780 l 0.100 0.200 q 0.045 0.075 c b a seating plane 224x m 0.010 c m 0.030 c m a m b 0.008 c l e d a q 0.020 0.016 1716151413121110987654321 u t r p n m l k j h g f e d c b a 16x 0.100 16x 0.100 0.080 max 0.080 max
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.181 programmable array 256pin package bg suffix plastic bga package case 1208a01 issue o 2120181716151413121110987654321 a b c d e f g h j k l m n p r t u v w y dim min max millimeters a 1.92 2.32 a1 0.50 0.70 a2 0.36 ref a3 1.12 1.22 b 0.60 0.90 d 27.00 bsc e 27.00 bsc f 24.00 24.70 g 24.00 24.70 e 1.27 bsc s 0.635 bsc notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimension b is measured at the maximum solder ball diameter, parallel to datum plane z. 4. datum z (seating plane) is defined by the spherical crowns of the solder balls. 3 x x 0.25 y z a rotated 90 clockwise d f m m y z g e 0.20 4 detail k 20x e s detail k 256x b 20x e s view mm 0.15 z 0.35 z a3 a2 a1
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.182 programmable array 299pin package hv suffix pin grid array package case 861b01 issue o notes: 1. dimensions are in inches. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. minimum spacing between conductors shall be 0.020. dim min max inches a 0.070 0.145 d 2.040 2.080 e 2.040 2.080 l 0.100 0.200 q 0.045 0.075 c b a seating plane 224x m 0.010 c m 0.030 c m a m b 0.008 c l e d a q 0.020 0.016 1716151413121110987654321 u t r p n m l k j h g f e d c b a 16x 0.100 16x 0.100 0.080 max 0.080 max s 0.050 bsc v w y 18 19 20
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.183 packaging information surface mount why surface mount? surface mount technology is utilized to offer answers to many problems that have been created in the use of insertion technology. limitations have been reached with insertion packages and pc board technology. surface mount technology offers the opportunity to continue to advance the state oftheart designs that cannot be accomplished with insertion technology. surface mount packages allow more optimum device performance with the smaller surface mount configuration. internal lead lengths, parasitic capacitance and inductance that placed limitations on chip performance have been reduced. the lower profile of surface mount packages allows more boards to be utilized in a given amount of space. they are stacked closer together and utilize less total volume than insertion populated pc boards. printed circuit costs are lowered with the reduction of the number of board layers required. the elimination or reduction of the number of plated through holes in the board, contributes significantly to lower pc board prices. automatic placement equipment is available that can place surface mount components at the rate of a few thousand per hour to hundreds of thousands of components per hour. surface mount technology is cost effective, allowing the manufacturer the opportunity to produce smaller units and/or offer increased functions with the same size product. surface mount assembly does not require the preparation of components that are common on insertion technology lines. surface mount components are sent directly to the assembly line, eliminating an intermediate step. pin conversion tables dualinline package to plcc pin conversion data the following table gives the equivalent i/o pinouts of dualinline package (dip) configuration and plastic leaded chip carrier (plcc) packages.* conversion tables 8 pin dip 1 2 3 4 5 6 7 8 20 pin plcc 2 5 7 10 12 15 17 20 14 pin dip 1 2 3 4 5 6 7 8 9 10 11 12 13 14 20 pin plcc 2 3 4 6 8 9 10 12 13 14 16 18 19 20 16 pin dip 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 20 pin plcc 2 3 4 5 7 8 9 10 12 13 14 15 17 18 19 20 20 pin dip 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 20 pin plcc 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 24 pin dip 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 28 pin plcc 2 3 4 5 6 7 9 10 11 12 13 14 16 17 18 19 20 21 23 24 25 26 27 28 * the mc1648 has a nonstandard conversion table. for more information, refer to the motorola mecl data book, dl122/d.
motorola master selection guide ttl, ecl, cmos and special logic circuits 3.184 tape and reel logic integrated circuits motorola's tape and reel packaging fully conforms to the latest eia rs481a specification. the antistatic embossed tape pro- vides a secure cavity sealed with a peelback cover tape. mechanical polarization plcc devices general information e reel size 13 inch (330 mm) suffix: r2 e units/reel 500 to 5000 (see table) e tape width 12 mm to 24 mm (see table) ordering information to order devices which are to be delivered in tape and reel, add the suffix r2 to the device number being ordered. soic devices linear direction of travel pin 1 view from tape side typical linear direction of travel view from tape side typical tape and reel data device type tape width (mm) device/reel reel size (inch) min lot size per part no. tape and reel plcc20 plcc28 so8 so14 so16 so16 wide so20 wide 16 24 12 16 16 16 24 1,000 500 2,500 2,500 2,500 1,000 1,000 13 13 13 13 13 13 13 3,000 500 5,000 5,000 5,000 5,000 5,000

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